Janet Meiling Wang

68 papers A* 5A 14Journal 17Unranked 30

Year	Rank	Type	Title / Venue / Authors
2018	—	`conf`	Evaluation of the Complexity of Automated Trace Alignment using Novel Power Obfuscation Methods. ACM Great Lakes Symposium on VLSI Bozhi Liu, Kemeng Chen, Minjun Seo, Janet Meiling Wang, Roman Lysecky
2013	A*	`conf`	OIRS: Outsourced Image Recovery Service From Comprehensive Sensing With Privacy Assurance. NDSS Cong Wang, Zhen Xu, Kui Ren, Janet Meiling Wang
2011	—	`ed.`	2011 International Workshop on System Level Interconnect Prediction, SLIP 2011, San Diego, CA, USA, June 5, 2011 SLIP Janet Meiling Wang, Deming Chen
2011	J	`jnl`	Information Theoretic Modeling and Analysis for Global Interconnects With Process Variations. IEEE Trans. Very Large Scale Integr. Syst. Stojan Z. Denic, Bane Vasic, Charalambos D. Charalambous, Jifeng Chen, Janet Meiling Wang
2010	—	`ed.`	International Workshop on System Level Interconnect Prediction Workshop, SLIP 2010, Anaheim, CA, USA, June 13, 2010 SLIP Sherief Reda, Janet Meiling Wang
2010	J	`jnl`	Predicting Analog Circuit Performance Based on Importance of Uncertainties. IEICE Trans. Electron. Jin Sun, Kiran Potluri, Janet Meiling Wang
2010	J	`jnl`	Principle Hessian Direction-Based Parameter Reduction for Interconnect Networks With Process Variation. IEEE Trans. Very Large Scale Integr. Syst. Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang
2010	—	`conf`	Robust gate sizing by Uncertainty Second Order Cone. ISQED Jin Sun, Janet Meiling Wang
2010	—	`conf`	Workload capacity considering NBTI degradation in multi-core systems. ASP-DAC Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang
2009	J	`jnl`	A Linear Fractional Transform (LFT) Based Model for Interconnect Uncertainty. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Omar Hafiz, Alexander V. Mitev, Janet Meiling Wang
2009	—	`conf`	Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures. ASP-DAC Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri, Janet Meiling Wang
2009	J	`jnl`	Delay Uncertainty Reduction by Gate Splitting. IEEE Trans. Circuits Syst. II Express Briefs Vineet Agarwal, Jin Sun, Janet Meiling Wang
2009	—	`conf`	Design of energy-efficient channel buffers with router bypassing for network-on-chips (NoCs). ISQED Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang
2009	—	`conf`	NBTI aware workload balancing in multi-core systems. ISQED Jin Sun, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang
2009	—	`conf`	Robust interconnect communication capacity algorithm by geometric programming. ISPD Jifeng Chen, Jin Sun, Janet Meiling Wang
2008	J	`jnl`	A noniterative equivalent waveform model for timing analysis in presence of crosstalk. ACM Trans. Design Autom. Electr. Syst. Kishore Kumar Muchherla, Pinhong Chen, Dongsheng Ma, Janet Meiling Wang
2008	—	`conf`	Chebyshev Affine Arithmetic based parametric yield prediction under limited descriptions of uncertainty. ASP-DAC Jin Sun, Yue Huang, Jun Li, Janet Meiling Wang
2008	J	`jnl`	Chebyshev Affine-Arithmetic-Based Parametric Yield Prediction Under Limited Descriptions of Uncertainty. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jin Sun, Jun Li, Dongsheng Ma, Janet Meiling Wang
2008	—	`conf`	Finite-Point Gate Model for Fast Timing and Power Analysis. ISQED Dinesh Ganesan, Alexander V. Mitev, Janet Meiling Wang, Yu Cao
2008	—	`conf`	Handling partial correlations in yield prediction. ASP-DAC Sridhar Varadan, Janet Meiling Wang, Jiang Hu
2008	J	`jnl`	Parameter reduction for variability analysis by slice inverse regression method. IET Circuits Devices Syst. Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang
2008	J	`jnl`	Robust Clock Tree Routing in the Presence of Process Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Uday Padmanabhan, Janet Meiling Wang, Jiang Hu
2007	J	`jnl`	A Probabilistic Collocation Method Based Statistical Gate Delay Model Considering Process Variations and Multiple Input Switching CoRR Y. Satish Kumar, Jun Li, Claudio Talarico, Janet Meiling Wang
2007	A	`conf`	A robust finite-point based gate model considering process variations. ICCAD Alexander V. Mitev, Dinesh Ganesan, Dheepan Shanmugasundaram, Yu Cao, Janet Meiling Wang
2007	—	`conf`	Delay Uncertainty Reduction by Interconnect and Gate Splitting. ASP-DAC Vineet Agarwal, Jin Sun, Alexander V. Mitev, Janet Meiling Wang
2007	J	`jnl`	Nano-Sim: A Step Wise Equivalent Conductance based Statistical Simulator for Nanotechnology Circuit Design CoRR Bharat B. Sukhwani, Uday Padmanabhan, Janet Meiling Wang
2007	—	`conf`	Parameter Reduction for Variability Analysis by Slice Inverse Regression (SIR) Method. ASP-DAC Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang
2007	A	`conf`	Principle Hessian direction based parameter reduction with process variation. ICCAD Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang
2007	—	`conf`	Principle hessian direction based parameter reduction for interconnect networks with process variation. SLIP Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang
2007	J	`jnl`	Simulation and Design of Nanocircuits With Resonant Tunneling Devices. IEEE Trans. Circuits Syst. I Regul. Pap. Janet Meiling Wang, Bharat Sukhwani, Uday Padmanabhan, Dongsheng Ma, Kartik Sinha
2007	J	`jnl`	Stochastic Power Grid Analysis Considering Process Variations CoRR Praveen Ghanta, Sarma B. K. Vrudhula, Rajendran Panda, Janet Meiling Wang
2006	—	`conf`	A probabilistic analysis of pipelined global interconnect under process variations. ASP-DAC Navneeth Kankani, Vineet Agarwal, Janet Meiling Wang
2006	A	`conf`	Adaptive on-chip power supply with robust one-cycle control technique. ISLPED Dongsheng Ma, Janet Meiling Wang, Pablo Vazquas
2006	J	`jnl`	Hermite Polynomial Based Interconnect Analysis in the Presence of Process Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sarma B. K. Vrudhula, Janet Meiling Wang, Praveen Ghanta
2006	J	`jnl`	Modeling the Driver Load in the Presence of Process Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Janet Meiling Wang, Jun Li, Satish K. Yanamanamanda, Lakshmi Kalpana Vakati, Kishore Kumar Muchherla
2006	—	`conf`	Statistical clock tree routing for robustness to process variations. ISPD Uday Padmanabhan, Janet Meiling Wang, Jiang Hu
2006	—	`conf`	Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA). ASP-DAC Vineet Agarwal, Janet Meiling Wang
2005	J	`jnl`	A New Three-Piece Driver Model with RLC Interconnect Load. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Lakshmi Kalpana Vakati, Kishore Kumar Muchherla, Janet Meiling Wang
2005	A	`conf`	A Probabilistic Collocation Method Based Statistical Gate Delay Model Considering Process Variations and Multiple Input Switching. DATE Y. Satish Kumar, Jun Li, Claudio Talarico, Janet Meiling Wang
2005	—	`conf`	A non-iterative equivalent waveform model for timing analysis in presence of crosstalk. ISCAS (3) Kishore Kumar Muchherla, Pinhong Chen, Janet Meiling Wang
2005	—	`conf`	A stepwise constant conductance approach for simulating resonant tunneling diodes. ISCAS (3) Bharat B. Sukhwani, Janet Meiling Wang
2005	—	`conf`	An efficient combinationality check technique for the synthesis of cyclic combinational circuits. ASP-DAC Vineet Agarwal, Navneeth Kankani, Ravishankar Rao, Sarvesh Bhardwaj, Janet Meiling Wang
2005	A	`conf`	Design and optimization on dynamic power system for self-powered integrated wireless sensing nodes. ISLPED Dongsheng Ma, Janet Meiling Wang, Mohankumar N. Somasundaram, Zongqi Hu
2005	A	`conf`	Efficient statistical capacitance variability modeling with orthogonal principle factor analysis. ICCAD Rong Jiang, Wenyin Fu, Janet Meiling Wang, Vince Lin, Charlie Chung-Ping Chen
2005	J	`jnl`	HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yu-Min Lee, Yahong Cao, Tsung-Hao Chen, Janet Meiling Wang, Charlie Chung-Ping Chen
2005	A	`conf`	Nano-Sim: A Step Wise Equivalent Conductance based Statistical Simulator for Nanotechnology Circuit Design. DATE Bharat B. Sukhwani, Uday Padmanabhan, Janet Meiling Wang
2005	A	`conf`	Stochastic Power Grid Analysis Considering Process Variations. DATE Praveen Ghanta, Sarma B. K. Vrudhula, Rajendran Panda, Janet Meiling Wang
2005	A	`conf`	System-level power and thermal modeling and analysis by orthogonal polynomial based response surface approach (OPRS). ICCAD Janet Meiling Wang, Bharat Srinivas, Dongsheng Ma, Charlie Chung-Ping Chen, Jun Li
2005	—	`conf`	Uncertainty modeling of gate delay considering multiple input switching. ISCAS (3) Satish K. Yanamanamanda, Jun Li, Janet Meiling Wang
2004	—	`conf`	A Clustering Based Area I/O Planning for Flip-Chip Technology. ISQED Janet Meiling Wang, Kishore Kumar Muchherla, Jai Ganesh Kumar
2004	A*	`conf`	A linear fractional transform (LFT) based model for interconnect parametric uncertainty. DAC Janet Meiling Wang, Omar Hafiz, Jun Li
2004	A*	`conf`	A methodology to improve timing yield in the presence of process variations. DAC Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wang
2004	—	`conf`	A new multi-ramp driver model with RLC interconnect load. ISCAS (5) Lakshmi Kalpana Vakati, Janet Meiling Wang
2004	—	`conf`	A new multi-ramp driver model with RLC interconnect load. ISPD Lakshmi Kalpana Vakati, Janet Meiling Wang
2004	—	`conf`	A new non-iterative model for switching window computation with crosstalk noise. ISCAS (2) Omar Hafiz, Pinhong Chen, Janet Meiling Wang
2004	—	`conf`	A non-iterative model for switching window computation with crosstalk noise. ASP-DAC Janet Meiling Wang, Omar Hafiz, Pinhong Chen
2004	—	`conf`	Matrix pencil based realizable reduction for distributed interconnects. ISCAS (5) Janet Meiling Wang, Omar Hafiz
2004	—	`conf`	Predicting Interconnect Uncertainty with a New Robust Model Order Reduction Method. ISQED Janet Meiling Wang, Omar Hafiz
2004	—	`conf`	Realizable parasitic reduction for distributed interconnects using matrix pencil technique. ASP-DAC Janet Meiling Wang, Prashant Saxena, Omar Hafiz, Xing Wang
2004	A	`conf`	Stochastic analysis of interconnect performance in the presence of process variations. ICCAD Janet Meiling Wang, Praveen Ghanta, Sarma B. K. Vrudhula
2003	—	`conf`	A New Continuous Switching Window Computation with Crosstalk Noise. SBCCI Janet Meiling Wang, Pinhong Chen, Omar Hafiz
2003	—	`conf`	Switching Windows Computation in Presence of Crosstalk Noise. VLSI Janet Meiling Wang, Pinhong Chen, Omar Hafiz
2000	A*	`conf`	Extended Krylov subspace method for reduced order analysis of linear circuits with multiple sources. DAC Janet Meiling Wang, Tuyen V. Nguyen
2000	A*	`conf`	Passive model order reduction algorithm based on Chebyshev expansion of impulse response of interconnect networks. DAC Qingjian Yu, Janet Meiling Wang, Ernest S. Kuh
1999	A	`conf`	Coupled Noise Estimation for Distributed RC Interconnect Model. DATE Janet Meiling Wang, Qingjian Yu, Ernest S. Kuh
1999	A	`conf`	The Chebyshev expansion based passive model for distributed interconnect networks. ICCAD Janet Meiling Wang, Ernest S. Kuh, Qingjian Yu
1998	A	`conf`	Multipoint moment matching model for multiport distributed interconnect networks. ICCAD Qingjian Yu, Janet Meiling Wang, Ernest S. Kuh
1996	A	`conf`	Simulation and sensitivity analysis of transmission line circuits by the characteristics method. ICCAD Jun-Fa Mao, Janet Meiling Wang, Ernest S. Kuh