Jan Mulder

24 papers Journal 12Unranked 12
YearRankTypeTitle / Venue / Authors
2017 — conf
Session 16 overview: Gigahertz data converters.
ISSCC
Jan Mulder, Paul Ferguson, Un-Ku Moon
2016 J jnl
Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits
Edgar Sánchez-Sinencio, Jan Mulder, Antonio Liscidini, Eric A. M. Klumperink, Elad Alon
2015 — conf
26.3 An 800MS/S 10b/13b receiver for 10GBASE-T Ethernet in 28nm CMOS.
ISSCC
Jan Mulder, Davide Vecchi, Yi Ke, Stefano Bozzola, Mark Core, Nitz Saputra, Qiongna Zhang, Jeff Riley, Han Yan, Mattia Introini, Sijia Wang, Christopher M. Ward, Jan R. Westra, Jiansong Wan, Klaas Bult
2014 — conf
11.4 A 1.5mW 68dB SNDR 80MS/s 2× interleaved SAR-assisted pipelined ADC in 28nm CMOS.
ISSCC
Frank M. L. van der Goes, Christopher M. Ward, Santosh Astgimath, Han Yan, Jeff Riley, Jan Mulder, Sijia Wang, Klaas Bult
2014 — conf
8.5 A sub-1.75W full-duplex 10GBASE-T transceiver in 40nm CMOS.
ISSCC
Jan R. Westra, Jan Mulder, Yi Ke, Davide Vecchi, Xiaodong Liu, Erol Arslan, Jiansong Wan, Qiongna Zhang, Sijia Wang, Frank M. L. van der Goes, Klaas Bult
2014 J jnl
A 1.5 mW 68 dB SNDR 80 Ms/s 2 × Interleaved Pipelined SAR ADC in 28 nm CMOS.
IEEE J. Solid State Circuits
Frank M. L. van der Goes, Christopher M. Ward, Santosh Astgimath, Han Yan, Jeff Riley, Zeng Zeng, Jan Mulder, Sijia Wang, Klaas Bult
2014 — conf
Design considerations for low-power analog front ends in full-duplex 10GBASE-T transceivers.
CICC
Jan R. Westra, Jan Mulder, Yi Ke, Davide Vecchi, Xiaodong Liu, Erol Arslan, Jiansong Wan, Qiongna Zhang, Sijia Wang, Frank M. L. van der Goes, Klaas Bult
2011 J jnl
An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS.
IEEE J. Solid State Circuits
Davide Vecchi, Jan Mulder, Frank M. L. van der Goes, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult
2011 — conf
An 800MS/s dual-residue pipeline ADC in 40nm CMOS.
ISSCC
Jan Mulder, Frank M. L. van der Goes, Davide Vecchi, Jan R. Westra, Emre Ayranci, Christopher M. Ward, Jiansong Wan, Klaas Bult
2010 J jnl
A Low-Power Capacitive Charge Pump Based Pipelined ADC.
IEEE J. Solid State Circuits
Imran Ahmed, Jan Mulder, David A. Johns
2009 J jnl
A 12 bit 2.9 GS/s DAC With IM3 ≪ -60 dBc Beyond 1 GHz in 65 nm CMOS.
IEEE J. Solid State Circuits
Chi-Hung Lin, Frank M. L. van der Goes, Jan R. Westra, Jan Mulder, Yu Lin, Erol Arslan, Emre Ayranci, Xiaodong Liu, Klaas Bult
2009 — conf
A 12b 2.9GS/s DAC with IM3 ≪-60dBc beyond 1GHz in 65nm CMOS.
ISSCC
Chi-Hung Lin, Frank M. L. van der Goes, Jan R. Westra, Jan Mulder, Yu Lin, Erol Arslan, Emre Ayranci, Xiaodong Liu, Klaas Bult
2009 — conf
A 50MS/s 9.9mW pipelined ADC with 58dB SNDR in 0.18µm CMOS using capacitive charge-pumps.
ISSCC
Imran Ahmed, Jan Mulder, David A. Johns
2005 J jnl
The e-Xperimenteren+ Project: Pool of Remote Experiments and Software Environment.
Int. J. Online Eng.
Jasper Bedaux, Leendert Van Gastel, Piet Blankert, Jan Mulder, Jeroen Verschuur, Wopke Wijngaard
2004 J jnl
A 21-mW 8-b 125-MSample/s ADC in 0.09-mm
IEEE J. Solid State Circuits
Jan Mulder, Christopher M. Ward, Chi-Hung Lin, David Kruse, Jan R. Westra, Marcel Lugthart, Erol Arslan, Rudy J. van de Plassche, Klaas Bult, Frank M. L. van der Goes
2001 — conf
Advances in low-voltage ultra-low-power analog circuit design.
ICECS
Wouter A. Serdijn, Jan Mulder, Daniel Rocha, Luís Cléber C. Marques
1999 — conf
A low-voltage translinear second-order quadrature oscillator.
ISCAS (2)
Wouter A. Serdijn, Jan Mulder, Michiel H. L. Kouwenhoven, Arthur H. M. van Roermund
1999 — conf
Analysis of noise in higher-order translinear filters.
ISCAS (6)
Michiel H. L. Kouwenhoven, Jan Mulder, Wouter A. Serdijn, Arthur H. M. van Roermund
1998 — conf
A new current mode synthesis method for dynamic translinear filters and its application in hearing aids.
ICECS
Dorra Masmoudi, Wouter A. Serdijn, Jan Mulder, Albert C. van der Woerd, Jean Tomas, Jean Paul Dom
1998 J jnl
A wide-tunable translinear second-order oscillator.
IEEE J. Solid State Circuits
Wouter A. Serdijn, Jan Mulder, Albert C. van der Woerd, Arthur H. M. van Roermund
1998 J jnl
An ultra-low-power, low-voltage electronic audio delay line for use in hearing aids.
IEEE J. Solid State Circuits
L. P. L. van Dijk, Albert C. van der Woerd, Jan Mulder, Arthur H. M. van Roermund
1997 J jnl
A low-voltage ultra-low-power translinear integrator for audio filter applications.
IEEE J. Solid State Circuits
Wouter A. Serdijn, Martijn Broest, Jan Mulder, Albert C. van der Woerd, Arthur H. M. van Roermund
1997 J jnl
A reduced-area low-power low-voltage single-ended differential pair.
IEEE J. Solid State Circuits
Jan Mulder, Marcel van de Gevel, Arthur H. M. van Roermund
1997 J jnl
An RMS-DC converter based on the dynamic translinear principle.
IEEE J. Solid State Circuits
Jan Mulder, Albert C. van der Woerd, Wouter A. Serdijn, Arthur H. M. van Roermund