Jan Korenek - RankMe

84 papers A* 1A 2B 16C 31Misc 3Journal 7Unranked 23

Year	Rank	Type	Title / Venue / Authors
2024	Misc	`conf`	LGBM2VHDL: Mapping of LightGBM Models to FPGA. FCCM Tomás Martínek, Jan Korenek, Tomás Cejka
2023	—	`conf`	400G Ethernet Packet Capture Demo Based on Network Development Kit for FPGAs. INFOCOM Workshops Jakub Cabal, Vladislav Válek, Martin Spinler, Daniel Kondys, Jan Korenek
2023	C	`conf`	Accelerating IDS Using TLS Pre-Filter in FPGA. ISCC Vlastimil Kosar, Lukas Sismis, Jirí Matousek, Jan Korenek
2023	B	`conf`	Analysis of TLS Prefiltering for IDS Acceleration. PAM Lukas Sismis, Jan Korenek
2023	C	`conf`	Optimizing Packet Classification on FPGA. DDECS Michal Kekely, Jan Korenek
2022	J	`jnl`	ClassBench-ng: Benchmarking Packet Classification Algorithms in the OpenFlow Era. IEEE/ACM Trans. Netw. Jirí Matousek, Adam Lucanský, David Janecek, Jozef Sabo, Jan Korenek, Gianni Antichi
2022	B	`conf`	FPL Demo: 400G FPGA Packet Capture Based on Network Development Kit. FPL Jakub Cabal, Jiri Sikora, Stepán Friedl, Martin Spinler, Jan Korenek
2021	C	`conf`	Efficient Acceleration of Decision Tree Algorithms for Encrypted Network Traffic Analysis. DDECS Roman Vrána, Jan Korenek
2021	—	`conf`	Increasing Memory Efficiency of Hash-Based Pattern Matching for High-Speed Networks. FPT Tomás Fukac, Jirí Matousek, Jan Korenek, Lukás Kekely
2021	C	`conf`	Scalability of Hash-Based Pattern Matching for High-Speed Network Security and Monitoring. ISCC Tomás Fukac, Jan Korenek, Jirí Matousek
2020	—	`conf`	Enabling Event-Triggered Data Plane Monitoring. SOSR Jan Kucera, Diana Andreea Popescu, Han Wang, Andrew W. Moore, Jan Korenek, Gianni Antichi
2020	J	`jnl`	General memory efficient packet matching FPGA architecture for future high-speed networks. Microprocess. Microsystems Michal Kekely, Lukás Kekely, Jan Korenek
2020	B	`conf`	Increasing Throughput of Intrusion Detection Systems by Hash-Based Short String Pre-filter. LCN Tomás Fukac, Vlastimil Kosar, Jan Korenek, Jirí Matousek
2020	C	`conf`	Multi Buses: Theory and Practical Considerations of Data Bus Width Scaling in FPGAs. DSD Lukás Kekely, Jakub Cabal, Viktor Pus, Jan Korenek
2019	C	`conf`	Acceleration of Feature Extraction for Real-Time Analysis of Encrypted Network Traffic. DDECS Roman Vrana, Jan Korenek, David Novak
2019	Misc	`conf`	Deep Packet Inspection in FPGAs via Approximate Nondeterministic Automata. FCCM Milan Ceska, Vojtech Havlena, Lukás Holík, Jan Korenek, Ondrej Lengál, Denis Matousek, Jirí Matousek, Jakub Semric, Tomás Vojnar
2019	J	`jnl`	Deep Packet Inspection in FPGAs via Approximate Nondeterministic Automata. CoRR Milan Ceska, Vojtech Havlena, Lukás Holík, Jan Korenek, Ondrej Lengál, Denis Matousek, Jirí Matousek, Jakub Semric, Tomás Vojnar
2019	—	`conf`	Effective FPGA Architecture for General CRC. ARCS Lukás Kekely, Jakub Cabal, Jan Korenek
2019	C	`conf`	Hash-based Pattern Matching for High Speed Networks. DDECS Tomas Fukac, Jan Korenek
2018	B	`conf`	Accelerated Wire-Speed Packet Capture at 200 Gbps. FPL Lukas Kekely, Martin Spinler, Stepan Friedl, Jiri Sikora, Jan Korenek
2018	A	`conf`	Configurable FPGA Packet Parser for Terabit Networks with Guaranteed Wire-Speed Throughput. FPGA Jakub Cabal, Pavel Benácek, Lukas Kekely, Michal Kekely, Viktor Pus, Jan Korenek
2018	—	`conf`	Demonstration of Full-Duplex Packet Transfers Over PCI Express with Sustained 200 Gbps Throughput. FPT Lukás Kekely, Martin Spinler, Stepán Friedl, Jiri Sikora, Jan Korenek, Viktor Pus
2018	C	`conf`	General IDS Acceleration for High-Speed Networks. ICCD Jan Kucera, Lukas Kekely, Adam Piecek, Jan Korenek
2018	—	`conf`	High-Speed Computation of CRC Codes for FPGAs. FPT Jakub Cabal, Lukás Kekely, Jan Korenek
2018	Misc	`conf`	High-Speed Regular Expression Matching with Pipelined Memory-Based Automata. FCCM Denis Matousek, Jirí Matousek, Jan Korenek
2018	B	`conf`	Live demonstration of FPGA based networking accelerator for 200 Gbps data transfers. NOMS Lukas Kekely, Martin Spinler, Stepan Friedl, Jiri Sikora, Jan Korenek
2018	C	`conf`	Memory Aware Packet Matching Architecture for High-Speed Networks. DSD Michal Kekely, Lukas Kekely, Jan Korenek
2018	—	`conf`	Regular expression matching with pipelined delayed input DFAs for high-speed networks. ANCS Denis Matousek, Juraj Kubis, Jirí Matousek, Jan Korenek
2018	J	`jnl`	Seek and Push: Detecting Large Traffic Aggregates in the Dataplane. CoRR Jan Kucera, Diana Andreea Popescu, Gianni Antichi, Jan Korenek, Andrew W. Moore
2017	—	`conf`	ClassBench-ng: Recasting ClassBench after a Decade of Network Evolution. ANCS Jirí Matousek, Gianni Antichi, Adam Lucanský, Andrew W. Moore, Jan Korenek
2017	J	`jnl`	Evolutionary design of hash function pairs for network filters. Appl. Soft Comput. Roland Dobai, Jan Korenek, Lukás Sekanina
2017	B	`conf`	Line rate programmable packet processing in 100Gb networks. FPL Pavel Benácek, Viktor Pus, Jan Korenek, Michal Kekely
2017	B	`conf`	Mapping of P4 match action tables to FPGA. FPL Michal Kekely, Jan Korenek
2017	C	`conf`	Packet Classification with Limited Memory Resources. DSD Michal Kekely, Jan Korenek
2016	—	`conf`	Adaptive development of hash functions in FPGA-based network routers. SSCI Roland Dobai, Jan Korenek, Lukás Sekanina
2016	C	`conf`	Dynamically Reconfigurable Architecture with Atomic Configuration Updates for Flexible Regular Expressions Matching in FPGA. DSD Vlastimil Kosar, Jan Korenek
2016	—	`conf`	Evaluating Reputation of Internet Entities. AIMS Václav Bartos, Jan Korenek
2016	J	`jnl`	Evolutionary circuit design for fast FPGA-based classification of network application protocols. Appl. Soft Comput. David Grochol, Lukás Sekanina, Martin Zádník, Jan Korenek, Vlastimil Kosar
2016	—	`conf`	High-speed regular expression matching with pipelined automata. FPT Denis Matousek, Jan Korenek, Viktor Pus
2016	B	`conf`	Packet processing on FPGA SoC with DPDK. FPL Jan Viktorin, Jan Korenek
2016	J	`jnl`	Software Defined Monitoring of Application Protocols. IEEE Trans. Computers Lukas Kekely, Jan Kucera, Viktor Pus, Jan Korenek, Athanasios V. Vasilakos
2015	B	`conf`	A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP. EvoApplications David Grochol, Lukás Sekanina, Martin Zádník, Jan Korenek
2015	—	`conf`	Evolution of Non-Cryptographic Hash Function Pairs for FPGA-Based Network Applications. SSCI Roland Dobai, Jan Korenek
2015	B	`conf`	Hardware accelerated flow measurement of 100 Gb ethernet. IM Viktor Pus, Petr Velan, Lukas Kekely, Jan Korenek, Pavel Minarík
2015	C	`conf`	Towards Efficient Field Programmable Pattern Matching Array. DSD Vlastimil Kosar, Jan Korenek
2014	C	`conf`	Design methodology of configurable high performance packet parser for FPGA. DDECS Viktor Pus, Lukas Kekely, Jan Korenek
2014	C	`conf`	Fast lookup for dynamic packet filtering in FPGA. DDECS Lukas Kekely, Martin Zádník, Jirí Matousek, Jan Korenek
2014	C	`conf`	Low latency book handling in FPGA for high frequency trading. DDECS Milan Dvorak, Jan Korenek
2014	—	`ed.`	Mathematical and Engineering Methods in Computer Science - 9th International Doctoral Workshop, MEMICS 2014, Telč, Czech Republic, October 17-19, 2014, Revised Selected Papers MEMICS Petr Hlinený, Zdenek Dvorák, Jirí Jaros, Jan Kofron, Jan Korenek, Petr Matula, Karel Pala
2014	—	`conf`	Network monitoring probe based on Xilinx Zynq. ANCS Jan Viktorin, Pavol Korcek, Tomas Fukac, Jan Korenek
2014	C	`conf`	On NFA-split architecture optimizations. DDECS Vlastimil Kosar, Jan Korenek
2014	A*	`conf`	Software Defined Monitoring of application protocols. INFOCOM Lukas Kekely, Viktor Pus, Jan Korenek
2014	B	`conf`	Trade-offs and progressive adoption of FPGA acceleration in network traffic monitoring. FPL Lukas Kekely, Viktor Pus, Pavel Benácek, Jan Korenek
2013	—	`conf`	Framework for fast prototyping of applications running on reconfigurable system on chip. DASIP Jan Viktorin, Pavol Korcek, Vlastimil Kosar, Jan Korenek
2013	C	`conf`	Hardware acceleration in computer networks. DDECS Jan Korenek
2013	C	`conf`	Hardware architecture for the fast pattern matching. DDECS Jan Kastil, Vlastimil Kosar, Jan Korenek
2013	B	`conf`	Memory efficient IP lookup in 100 GBPS networks. FPL Jirí Matousek, Martin Skacan, Jan Korenek
2013	—	`conf`	NFA reduction for regular expressions matching using FPGA. FPT Vlastimil Kosar, Martin Zádník, Jan Korenek
2013	C	`conf`	Towards hardware architecture for memory efficient IPv4/IPv6 Lookup in 100 Gbps networks. DDECS Jirí Matousek, Martin Skacan, Jan Korenek
2012	—	`conf`	A new embedded platform for rapid development of network applications. ANCS Jan Korenek, Pavol Korcek, Vlastimil Kosar, Martin Zádník, Jan Viktorin
2012	—	`conf`	Low-latency modular packet header parser for FPGA. ANCS Viktor Pus, Lukas Kekely, Jan Korenek
2012	B	`conf`	Reducing memory in high-speed packet classification. IWCMC Viktor Pus, Jan Korenek
2011	C	`conf`	Effective hash-based IPv6 longest prefix match. DDECS Jiri Tobola, Jan Korenek
2011	C	`conf`	Hardware architecture for packet classification with prefix coloring. DDECS Viktor Pus, Michal Kajan, Jan Korenek
2011	—	`conf`	Netbench: Framework for Evaluation of Packet Processing Algorithms. ANCS Viktor Pus, Jiri Tobola, Vlastimil Kosar, Jan Kastil, Jan Korenek
2011	C	`conf`	Reduction of FPGA resources for regular expression matching by relation similarity. DDECS Vlastimil Kosar, Jan Korenek
2010	C	`conf`	Efficient mapping of nondeterministic automata to FPGA for fast regular expression matching. DDECS Jan Korenek, Vlastimil Kosar
2010	—	`conf`	Efficient packet classification algorithm based on entropy. ANCS Michal Kajan, Jan Korenek
2010	C	`conf`	Hardware accelerated pattern matching based on Deterministic Finite Automata with perfect hashing. DDECS Jan Kastil, Jan Korenek
2010	—	`conf`	High speed pattern matching algorithm based on deterministic finite automata with faulty transition table. ANCS Jan Kastil, Jan Korenek
2010	C	`conf`	Memory optimizations for packet classification algorithms in FPGA. DDECS Viktor Pus, Juraj Blaho, Jan Korenek
2010	—	`conf`	NFA split architecture for fast regular expression matching. ANCS Jan Korenek, Vlastimil Kosar
2009	A	`conf`	Fast and scalable packet classification using perfect hash functions. FPGA Viktor Pus, Jan Korenek
2009	—	`conf`	Memory optimization for packet classification algorithms. ANCS Juraj Blaho, Jan Korenek, Viktor Pus
2009	C	`conf`	Methodology for Fast Pattern Matching by Deterministic Finite Automaton with Perfect Hashing. DSD Jan Kastil, Jan Korenek, Ondrej Lengál
2009	C	`conf`	Packet header analysis and field extraction for multigigabit networks. DDECS Petr Kobierský, Jan Korenek, Libor Polcak
2008	B	`conf`	GICS: Generic interconnection system. FPL Tamas Malek, Tomás Martínek, Jan Korenek
2008	C	`conf`	Network Probe for Flexible Flow Monitoring. DDECS Martin Zádník, Jan Korenek, Petr Kobierský, Ondrej Lengál
2007	B	`conf`	FlowContext: Flexible Platform for Multigigabit Stateful Packet Processing. FPL Martin Kosek, Jan Korenek
2007	C	`conf`	Intrusion Detection System Intended for Multigigabit Networks. DDECS Jan Korenek, Petr Kobierský
2007	C	`conf`	Online Protocol Testing for FPGA Based Fault Tolerant Systems. DSD Jiri Tobola, Zdenek Kotásek, Jan Korenek, Tomás Martínek, Martin Straka
2006	C	`conf`	A Flexible Technique for the Automatic Design of Approximate String Matching Architectures. DDECS Tomás Martínek, Jan Korenek, Otto Fucík, Matej Lexa
2005	—	`conf`	Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs. ICES Jan Korenek, Lukás Sekanina
2005	B	`conf`	NetFlow Probe Intended for High-Speed Networks. FPL Martin Zádník, Tomas Pecenka, Jan Korenek