Jan Kastil

17 papers C 12Journal 1Unranked 3
YearRankTypeTitle / Venue / Authors
2016 — —
Optimalizace algoritmů a DatovýCH Struktur Pro VyhledáVání ReguláRníCH VýRazů S VyužITíM Technologie FPGA ; Optimization of Algorithms and Data Structures for Regular expression Matching using FPGA Technology.
Jan Kastil
2015 — conf
Fault tolerant Field Programmable Neural Networks.
NORCAS
Martin Krcma, Zdenek Kotásek, Jan Kastil
2015 C conf
Mapping Trained Neural Networks to FPNNs.
DDECS
Martin Krcma, Jan Kastil, Zdenek Kotásek
2014 C conf
Automatic Construction of On-line Checking Circuits Based on Finite Automata.
DSD
Lucie Matuova, Jan Kastil, Zdenek Kotásek
2013 C conf
Fault tolerant CAN bus control system implemented into FPGA.
DDECS
Karel Szurman, Jan Kastil, Martin Straka, Zdenek Kotásek
2013 J jnl
Fault tolerant system design and SEU injection based testing.
Microprocess. Microsystems
Martin Straka, Jan Kastil, Zdenek Kotásek, Lukas Miculka
2013 C conf
Hardware architecture for the fast pattern matching.
DDECS
Jan Kastil, Vlastimil Kosar, Jan Korenek
2012 C conf
Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA.
DSD
Jan Kastil, Martin Straka, Lukas Miculka, Zdenek Kotásek
2012 C conf
Test platform for fault tolerant systems design properties verification.
DDECS
Martin Straka, Lukas Miculka, Jan Kastil, Zdenek Kotásek
2011 C conf
Advanced fault tolerant bus for multicore system implemented in FPGA.
DDECS
Martin Straka, Jan Kastil, Jaroslav Novotný, Zdenek Kotásek
2011 — conf
Netbench: Framework for Evaluation of Packet Processing Algorithms.
ANCS
Viktor Pus, Jiri Tobola, Vlastimil Kosar, Jan Kastil, Jan Korenek
2011 C conf
SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems.
DSD
Martin Straka, Jan Kastil, Zdenek Kotásek
2010 C conf
Fault Tolerant Structure for SRAM-Based FPGA via Partial Dynamic Reconfiguration.
DSD
Martin Straka, Jan Kastil, Zdenek Kotásek
2010 C conf
Hardware accelerated pattern matching based on Deterministic Finite Automata with perfect hashing.
DDECS
Jan Kastil, Jan Korenek
2010 — conf
High speed pattern matching algorithm based on deterministic finite automata with faulty transition table.
ANCS
Jan Kastil, Jan Korenek
2010 C conf
Modern fault tolerant architectures based on partial dynamic reconfiguration in FPGAs.
DDECS
Martin Straka, Jan Kastil, Zdenek Kotásek
2009 C conf
Methodology for Fast Pattern Matching by Deterministic Finite Automaton with Perfect Hashing.
DSD
Jan Kastil, Jan Korenek, Ondrej Lengál