Jan Heisswolf

19 papers A* 1A 1C 2Journal 3Unranked 12
YearRankTypeTitle / Venue / Authors
2017 J jnl
Efficient task spawning for shared memory and message passing in many-core architectures.
J. Syst. Archit.
Aurang Zaib, Thomas Wild, Andreas Herkersdorf, Jan Heisswolf, Jürgen Becker, Andreas Weichslgartner, Jürgen Teich
2015 — conf
A Framework for Multi-FPGA Interconnection using Multi Gigabit Transceivers.
SBCCI
Michael Dreschmann, Jan Heisswolf, Michael Geiger, Manuel Haußecker, Jürgen Becker
2015 — conf
Fault-tolerant communication in invasive networks on chip.
AHS
Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Stephanie Friederich, Leonard Masing, Carsten Stein, Marco Duden, Roman Klopfer, Jürgen Teich, Thomas Wild, Andreas Herkersdorf, Jürgen Becker
2014 A* conf
CAP: Communication Aware Programming.
DAC
Jan Heisswolf, Aurang Zaib, Andreas Zwinkau, Sebastian Kobbe, Andreas Weichslgartner, Jürgen Teich, Jörg Henkel, Gregor Snelting, Andreas Herkersdorf, Jürgen Becker
2014 — conf
Hardware/software debugging of large scale many-core architectures.
SBCCI
Stephanie Friederich, Jan Heisswolf, Jürgen Becker
2014 — conf
The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure.
ARCS Workshops
Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Martin Karle, Maximilian Singh, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
2013 C conf
AUTO-GS: Self-Optimization of NoC Traffic through Hardware Managed Virtual Connections.
DSD
Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf
2013 — conf
Efficient memory access in 2D Mesh NoC architectures using high bandwidth routers.
SBCCI
Jan Heisswolf, Simon Bischof, Michael Rückauer, Jürgen Becker
2013 — conf
Hardware Supported Adaptive Data Collection for Networks on Chip.
IPDPS Workshops
Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Ralf König, Thomas Wild, Andreas Herkersdorf, Jürgen Teich, Jürgen Becker
2013 A conf
Hybrid interconnect design for heterogeneous hardware accelerators.
DATE
Cuong Pham-Quoc, Jan Heisswolf, Stephan Werner, Zaid Al-Ars, Jürgen Becker, Koen Bertels
2013 J jnl
Providing multiple hard latency and throughput guarantees for packet switching networks on chip.
Comput. Electr. Eng.
Jan Heisswolf, Ralf König, Martin Kupper, Jürgen Becker
2013 — conf
Rerouting: Scalable NoC self-optimization by distributed hardware-based connection reallocation.
ReConFig
Jan Heisswolf, Maximilian Singh, Martin Kupper, Ralf König, Jürgen Becker
2013 J jnl
Virtual networks - distributed communication resource management.
ACM Trans. Reconfigurable Technol. Syst.
Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
2012 C conf
A Scalable NoC Router Design Providing QoS Support Using Weighted Round Robin Scheduling.
ISPA
Jan Heisswolf, Ralf König, Jürgen Becker
2012 — conf
Hardware prototyping of novel invasive multicore architectures.
ASP-DAC
Jürgen Becker, Stephanie Friederich, Jan Heisswolf, Ralf König, David May
2012 — conf
Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS.
IPDPS Workshops
Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
2012 — conf
Invasive manycore architectures.
ASP-DAC
Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe
2011 — conf
A Scalable Microarchitecture Design that Enables Dynamic Code Execution for Variable-Issue Clustered Processors.
IPDPS Workshops
Ralf König, Timo Stripf, Jan Heisswolf, Jürgen Becker
2011 — conf
Architecture design space exploration of run-time scalable issue-width processors.
ICSAMOS
Ralf König, Timo Stripf, Jan Heisswolf, Jürgen Becker