Jan-Ou Wu

12 papers C 2Journal 5Unranked 5
YearRankTypeTitle / Venue / Authors
2014 J jnl
A Multi-band Low noise amplifier with gain flatness and Bandwidth enhancement.
J. Circuits Syst. Comput.
San-Fu Wang, Jan-Ou Wu, Yang-Hsin Fan, Jhen-Ji Wang
2012 — conf
Middleware Software for Embedded Systems.
AINA Workshops
Yang-Hsin Fan, Jan-Ou Wu
2009 J jnl
Maximal Delay Reduction for RLC-Based Multi-Source Multi-Sink Bus with Repeater Insertion.
Circuits Syst. Signal Process.
Chia-Chun Tsai, Jan-Ou Wu, Trong-Yen Lee
2008 J jnl
GDME: Grey Relational Clustering Applied to a Clock Tree Construction with Zero Skew and Minimal Delay.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Chia-Chun Tsai, Jan-Ou Wu, Trong-Yen Lee
2008 C conf
Layer assignment considering manufacturability in X-architecture clock tree.
CIT
Chia-Chun Tsai, Wei-Shi Lin, Jan-Ou Wu, Chung-Chieh Kuo, Trong-Yen Lee
2008 — conf
X-clock routing based on pattern matching.
SoCC
Chia-Chun Tsai, Chung-Chieh Kuo, Jan-Ou Wu, Trong-Yen Lee, Rong-Shue Hsiao
2007 J jnl
Zero-Skew Driven Buffered RLC Clock Tree Construction.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Jan-Ou Wu, Chia-Chun Tsai, Chung-Chieh Kuo, Trong-Yen Lee
2006 C conf
Coupling aware RLC-based clock routings for crosstalk minimization.
ISCAS
Chia-Chun Tsai, Jan-Ou Wu, Chien-Wen Kao, Trong-Yen Lee, Rong-Shue Hsiao
2006 — conf
Propagation Delay Minimization on RLC-Based Bus with Repeater Insertion.
APCCAS
Chia-Chun Tsai, Jan-Ou Wu, Trong-Yen Lee, Rong-Shue Hsiao
2006 — conf
Tapping Point Numerical-Based Search for Exact Zero-Skew RLC Clock Tree Construction.
APCCAS
Chia-Chun Tsai, Jan-Ou Wu, Yu-Ting Shieh, Chung-Chieh Kuo, Trong-Yen Lee
2006 J jnl
Using Stack Reconstruction on RTL Orthogonal Scan Chain Design.
J. Inf. Sci. Eng.
Chia-Chun Tsai, Hann-Cheng Huang, Trong-Yen Lee, Wen-Ta Lee, Jan-Ou Wu
2005 — conf
Zero-Skew Driven for RLC Clock Tree Construction in SoC.
ICITA (1)
Chia-Chun Tsai, Jan-Ou Wu, Chung-Chieh Kuo, Trong-Yen Lee, Wen-Ta Lee