James R. Goodman

52 papers A* 18A 8B 2Journal 15Unranked 6

Year	Rank	Type	Title / Venue / Authors
2014	—	`conf`	Author retrospective for code scheduling and register allocation in large basic blocks. ICS 25th Anniversary James R. Goodman, Wei-Chung Hsu
2011	A	`conf`	Transactional conflict decoupling and value prediction. ICS Fuad Tabba, Andrew W. Hay, James R. Goodman
2009	B	`conf`	NZTM: nonblocking zero-indirection transactional memory. SPAA Fuad Tabba, Mark Moir, James R. Goodman, Andrew W. Hay, Cong Wang
2004	J	`jnl`	Billion-Transistor Architectures: There and Back Again. Computer Doug Burger, James R. Goodman
2004	—	`book`	Computerarchitektur - Strukturen, Konzepte, Grundlagen, 4. Auflage. Andrew S. Tanenbaum, James R. Goodman
2004	J	`jnl`	Inferential Queueing and Speculative Push. Int. J. Parallel Program. Ravi Rajwar, Alain Kägi, James R. Goodman
2004	A	`ed.`	Proceedings of the 18th Annual International Conference on Supercomputing, ICS 2004, Saint Malo, France, June 26 - July 01, 2004 ICS Paul Feautrier, James R. Goodman, André Seznec
2003	A	`conf`	Inferential queueing and speculative push for reducing critical communication latencies. ICS Ravi Rajwar, Alain Kägi, James R. Goodman
2003	J	`jnl`	Transactional Execution: Toward Reliable, High-Performance Multithreading. IEEE Micro Ravi Rajwar, James R. Goodman
2002	A*	`conf`	Transactional lock-free execution of lock-based programs. ASPLOS Ravi Rajwar, James R. Goodman
2001	—	`book`	Computerarchitektur - Strukturen, Konzepte, Grundlagen, 4. Auflage. Andrew S. Tanenbaum, James R. Goodman
2001	A*	`conf`	Speculative lock elision: enabling highly concurrent multithreaded execution. MICRO Ravi Rajwar, James R. Goodman
2000	A*	`conf`	Improving the Throughput of Synchronization by Insertion of Delays. HPCA Ravi Rajwar, Alain Kägi, James R. Goodman
1999	J	`jnl`	DataScalar: A memory-centric approach to computing. J. Syst. Archit. Stefanos Kaxiras, Doug Burger, James R. Goodman
1999	A*	`conf`	Improving CC-NUMA Performance Using Instruction-Based Prediction. HPCA Stefanos Kaxiras, James R. Goodman
1998	A	`conf`	A Study of Three Dynamic Approaches to Handle Widely Shared Data in Shared-memory Multiprocessors. International Conference on Supercomputing Stefanos Kaxiras, Stein Gjessing, James R. Goodman
1998	—	`conf`	Retrospective: Using Cache Memory to Reduce Processor-Memory Traffic. 25 Years ISCA: Retrospectives and Reprints James R. Goodman
1998	—	`conf`	Using Cache Memory to Reduce Processor-Memory Traffic. 25 Years ISCA: Retrospectives and Reprints James R. Goodman
1997	J	`jnl`	Billion-Transistor Architectures - Guest Editors' Introduction. Computer Doug Burger, James R. Goodman
1997	A*	`conf`	DataScalar Architectures. ISCA Doug Burger, Stefanos Kaxiras, James R. Goodman
1997	A*	`conf`	Efficient Synchronization: Let Them Eat QOLB. ISCA Alain Kägi, Doug Burger, James R. Goodman
1997	J	`jnl`	Limited bandwidth to affect processor design. IEEE Micro Doug Burger, James R. Goodman, Alain Kägi
1997	—	`ch.`	Memory Systems. The Computer Science and Engineering Handbook Doug Burger, James R. Goodman, Gurindar S. Sohi
1996	A*	`conf`	Memory Bandwidth Limitations of Future Microprocessors. ISCA Doug Burger, James R. Goodman, Alain Kägi
1996	A	`conf`	The GLOW Cache Coherence Protocol Extensions for Widely Shared Data. International Conference on Supercomputing Stefanos Kaxiras, James R. Goodman
1995	A	`conf`	Techniques for Reducing Overheads of Shared-Memory Multiprocessing. International Conference on Supercomputing Alain Kägi, Nagi Aboulenein, Doug Burger, James R. Goodman
1994	—	`conf`	Hardware Support for Synchronization in the Scalable Coherent Interface (SCI). IPPS Nagi Aboulenein, James R. Goodman, Stein Gjessing, Philip J. Woest
1994	J	`jnl`	The Impact of Pipelined Channels on k-ary n-Cube Networks. IEEE Trans. Parallel Distributed Syst. Steven L. Scott, James R. Goodman
1993	J	`jnl`	Performance of Pruning-Cache Directories for Large-Scale Multiprocessors. IEEE Trans. Parallel Distributed Syst. Steven L. Scott, James R. Goodman
1992	A*	`conf`	Performance of the SCI Ring. ISCA Steven L. Scott, James R. Goodman, Mary K. Vernon
1992	J	`jnl`	Report of the Purdue Workshop on Grand Challenges in Computer Architecture for the Support of High Performance Computing. J. Parallel Distributed Comput. Howard Jay Siegel, Seth Abraham, William L. Bain, Kenneth E. Batcher, Thomas L. Casavant, Doug DeGroot, Jack B. Dennis, David C. Douglas, Tse-Yun Feng, James R. Goodman, Alan Huang, Harry F. Jordan, J. Robert Jamp, Yale N. Patt, Alan Jay Smith, James E. Smith, Lawrence Snyder, Harold S. Stone, Russ Tuck, Benjamin W. Wah
1992	—	`conf`	Synthesizing General Topologies from Rings. ICPP (1) Ross E. Johnson, James R. Goodman
1990	A*	`ed.`	Proceedings of the 17th Annual International Symposium on Computer Architecture, Seattle, WA, USA, June 1990 ISCA Jean-Loup Baer, Larry Snyder, James R. Goodman
1989	A*	`conf`	Efficent Synchronization Primitives for Large-Scale Cache-Coherent Multiprocessors. ASPLOS James R. Goodman, Mary K. Vernon, Philip J. Woest
1989	J	`jnl`	On the Minimization of Loads/Stores in Local Register Allocation. IEEE Trans. Software Eng. Wei-Chung Hsu, Charles N. Fischer, James R. Goodman
1989	A	`conf`	Restricted Fetch&Phi operations for parallel processing. ICS Gurindar S. Sohi, James E. Smith, James R. Goodman
1988	A	`conf`	Code scheduling and register allocation in large basic blocks. ICS James R. Goodman, Wei-Chung Hsu
1988	J	`jnl`	Reply to David R. Cheriton's, Pat Boyle's, and Gert A. Slavenburg's "Comments on 'Coherency for multiprocessor virtual addressed caches' by James R. Goodman". SIGARCH Comput. Archit. News James R. Goodman
1988	A*	`conf`	The Wisconsin Multicube: A New Large-Scale Cache-Coherent Multiprocessor. ISCA James R. Goodman, Philip J. Woest
1987	A*	`conf`	Coherency for Multiprocessor Virtual Address Caches. ASPLOS James R. Goodman
1987	A*	`conf`	WISQ: A Restartable Architecture Using Queues. ISCA Andrew R. Pleszkun, James R. Goodman, Wei-Chung Hsu, R. T. Joersz, George E. Bier, Philip J. Woest, P. B. Schechter
1986	J	`jnl`	Comments on "A Massive Memory Machine". IEEE Trans. Computers James R. Goodman, Honesty C. Young
1986	A*	`conf`	On the Use of Registers vs. Cache to Minimize Memory Traffic. ISCA James R. Goodman, Wei-Chung Hsu
1986	B	`conf`	The Design of a Queue-Based Vector Supercomputer. ICPP Honesty C. Young, James R. Goodman
1985	J	`jnl`	Instruction Cache Replacement Policies and Organizations. IEEE Trans. Computers James E. Smith, James R. Goodman
1985	A*	`conf`	PIPE: A VLSI Decoupled Architecture. ISCA James R. Goodman, Jian-tu Hsieh, Koujuch Liou, Andrew R. Pleszkun, P. B. Schechter, Honesty C. Young
1984	A*	`conf`	The Use of Static Column RAM as a Memory Hierarchy. ISCA James R. Goodman, MenChow Chiang
1983	A*	`conf`	A Study of Instruction Cache Organizations and Replacement Policies ISCA James E. Smith, James R. Goodman
1983	A*	`conf`	Using Cache Memory to Reduce Processor-Memory Traffic ISCA James R. Goodman
1982	—	`conf`	VLSI Considerations that Influence Data Flow Architecture. COMPCON Chinya V. Ravishankar, James R. Goodman
1981	J	`jnl`	Hypertree: A Multiprocessor Interconnection Topology. IEEE Trans. Computers James R. Goodman, Carlo H. Séquin
1972	J	`jnl`	Some Properties of Iterative Square-Rooting Methods Using High-Speed Multiplication. IEEE Trans. Computers Chittoor V. Ramamoorthy, James R. Goodman, K. H. Kim