James R. Armstrong

27 papers A* 5A 4C 1Misc 1Journal 11Unranked 5

Year	Rank	Type	Title / Venue / Authors
2004	—	`conf`	Synthesis of SystemC models from SDF Ptolemy descriptions. SoCC Brian A. Jackson, James R. Armstrong
2002	A	`conf`	A Multi-Language Goal-Tree Based Functional Test Planning System. ITC Rajneesh Mahajan, Ramesh Govindarajulu, James R. Armstrong, F. Gail Gray
1999	J	`jnl`	VHDL modeling and model testing for DSP applications. IEEE Trans. Ind. Electron. James R. Armstrong, F. Gail Gray, Meng-Wei Lin
1998	A	`conf`	A goal tree based high-level test planning system for DSP real number models. ITC Morris Lin, James R. Armstrong, F. Gail Gray
1996	J	`jnl`	Efficient approaches to testing VHDL DSP models. J. VLSI Signal Process. James R. Armstrong, Geoff Frank, F. Gail Gray
1995	Misc	`conf`	Efficient approaches to testing VHDL DSP models. ICASSP James R. Armstrong
1994	A	`conf`	B-algorithm: A Behavioral-Test Generation Algorithm. ITC Chang Hyun Cho, James R. Armstrong
1993	—	`conf`	Hierarchical test generation: Where we are, and where we should be going. EURO-DAC James R. Armstrong
1993	—	`conf`	The Modeler's Assistant: A CAD Tool for Behavioral Model Development. CHDL Balraj Singh, John R. Wicks, Philip Wright, James R. Armstrong
1992	A	`conf`	Timing distribution in VHDL behavioral models. ICCAD Ashish S. Gadagkar, James R. Armstrong
1990	C	`conf`	Automated assists to the behavioral modeling process. RSP James R. Armstrong, D. Burnette
1990	A*	`conf`	Behavioral Fault Simulation in VHDL. DAC P. C. Ward, James R. Armstrong
1990	J	`jnl`	Tuning VHDL for Multivalve Logic Modeling. IEEE Des. Test Comput. James R. Armstrong
1989	J	`jnl`	t-TDA-Diagnosable Systems. IEEE Trans. Computers S.-C. Chu, James R. Armstrong
1986	A*	`conf`	A heuristic chip-level test generation algorithm. DAC Daniel S. Barclay, James R. Armstrong
1985	A*	`conf`	Functional fault modeling and simulation for VLSI devices. DAC Anil K. Gupta, James R. Armstrong
1984	J	`jnl`	Chip Level Modeling of LSI Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. James R. Armstrong
1981	J	`jnl`	Fault Diagnosos in a Boolean IEEE Trans. Computers James R. Armstrong, F. Gail Gray
1981	A*	`conf`	GSP: A logic simulator for LSI. DAC James R. Armstrong, D. E. Devlin
1981	J	`jnl`	Representation of Multivalued Functions Using the Direct Cover Method. IEEE Trans. Computers Gardner Pomper, James R. Armstrong
1981	J	`jnl`	Tree Structured Sequential Multiple-Valued Logic Design from Universal Modules. IEEE Trans. Computers Adit D. Singh, F. Gail Gray, James R. Armstrong
1980	J	`jnl`	Special Feature Chip-Level Simulation of Microprocessors. Computer James R. Armstrong, Garry W. Woodruff
1980	J	`jnl`	The Complexity of Computational Circuits Versus Radix. IEEE Trans. Computers James R. Armstrong
1978	—	`conf`	A simultaneous, radix four, I2L multiplier mechanized via repeated addition. MVL Adit D. Singh, James R. Armstrong
1978	—	`conf`	The modular complexity of a tree structured higher radix multiplier. MVL James R. Armstrong
1977	A*	`conf`	Simulation techniques for microprocessors. DAC James R. Armstrong, Garry W. Woodruff
1973	J	`jnl`	Design of a Graphic Generator for Remote Terminal Application. IEEE Trans. Computers James R. Armstrong