James McLurkin

53 papers A* 8A 11B 1C 3Misc 1Journal 14Unranked 14
YearRankTypeTitle / Venue / Authors
2017 J jnl
IEEE Robotics Autom. Lett.
Yu Zhou, Ron Goldman, James McLurkin
2017 J jnl
J. Graph Algorithms Appl.
Aditya Kumar Akash, Sándor P. Fekete, Seoung Kyou Lee, Alejandro López-Ortiz, Daniela Maftuleac, James McLurkin
2016 conf
DARS
Golnaz Habibi, Sándor P. Fekete, Zachary Kingston, James McLurkin
2016 A conf
IROS
SeoungKyou Lee, Daniel Kim, Dong Suk Shin, Taeho Jang, James McLurkin
2016 B conf
WALCOM
Aditya Kumar Akash, Sándor P. Fekete, Seoung Kyou Lee, Alejandro López-Ortiz, Daniela Maftuleac, James McLurkin
2016 J jnl
CoRR
Aditya Kumar Akash, Sándor P. Fekete, SeoungKyou Lee, Alejandro López-Ortiz, Daniela Maftuleac, James McLurkin
2016 J jnl
Int. J. Robotics Res.
Seoung Kyou Lee, Sándor P. Fekete, James McLurkin
2015 J jnl
CoRR
Dominik Krupke, Michael Hemmer, James McLurkin, Yu Zhou, Sándor P. Fekete
2015 A conf
IROS
Dominik Krupke, Michael Hemmer, James McLurkin, Yu Zhou, Sándor P. Fekete
2015 A* conf
ICRA
Golnaz Habibi, Zachary Kingston, William Xie, Mathew Jellins, James McLurkin
2015 A* conf
ICRA
Daniela Maftuleac, SeoungKyou Lee, Sándor P. Fekete, Aditya Kumar Akash, Alejandro López-Ortiz, James McLurkin
2015 A conf
AAMAS
Golnaz Habibi, Zachary Kingston, Zijian Wang, Mac Schwager, James McLurkin
2015 A* conf
ICRA
Amichai Levy, Chris Keitel, Sam Engel, James McLurkin
2014 A conf
IROS
James McLurkin, Adam McMullen, Nick Robbins, Golnaz Habibi, Aaron T. Becker, Alvin Chou, Hao Li, Meagan John, Nnena Okeke, Joshua Rykowski, Sunny Kim, William Xie, Taylor Vaughn, Yu Zhou, Jennifer Shen, Nelson Chen, Quillan Kaseman, Lindsay Langford, Jeremy Hunt, Amanda Boone, Kevin Koch
2014 J jnl
Int. J. Robotics Res.
Aaron T. Becker, Cem Onyuksel, Timothy Bretl, James McLurkin
2014 J jnl
CoRR
Aaron T. Becker, Chris Ertel, James McLurkin
2014 A* conf
ICRA
Aaron T. Becker, Chris Ertel, James McLurkin
2014 conf
DARS
Golnaz Habibi, William Xie, Mathew Jellins, James McLurkin
2014 A conf
IROS
SeoungKyou Lee, James McLurkin
2014 J jnl
CoRR
SeoungKyou Lee, Aaron T. Becker, Sándor P. Fekete, Alexander Kröller, James McLurkin
2014 A* conf
ICRA
Seoung Kyou Lee, Aaron T. Becker, Sándor P. Fekete, Alexander Kröller, James McLurkin
2014 A conf
IROS
SeoungKyou Lee, Sándor P. Fekete, James McLurkin
2014 J jnl
CoRR
Daniela Maftuleac, SeoungKyou Lee, Sándor P. Fekete, Aditya Kumar Akash, Alejandro López-Ortiz, James McLurkin
2014 J jnl
CoRR
Aaron T. Becker, Erik D. Demaine, Sándor P. Fekete, James McLurkin
2014 A* conf
ICRA
Aaron T. Becker, Erik D. Demaine, Sándor P. Fekete, James McLurkin
2013 A conf
AAMAS
Michael Rubenstein, Adrian Cabrera, Justin Werfel, Golnaz Habibi, James McLurkin, Radhika Nagpal
2013 A conf
IROS
Aaron T. Becker, James McLurkin
2013 C conf
ISRR
Golnaz Habibi, Lauren Schmidt, Mathew Jellins, James McLurkin
2013 A conf
IROS
Aaron T. Becker, Golnaz Habibi, Justin Werfel, Michael Rubenstein, James McLurkin
2013 C conf
ALGOSENSORS
Aaron T. Becker, Erik D. Demaine, Sándor P. Fekete, Golnaz Habibi, James McLurkin
2013 J jnl
Int. J. Robotics Res.
Alejandro Cornejo, Andrew J. Lynch, Elizabeth Fudge, Siegfried Bilstein, Majid Khabbazian, James McLurkin
2013 A* conf
SoCG
Aaron T. Becker, Sándor P. Fekete, Alexander Kröller, SeoungKyou Lee, James McLurkin, Christiane Schmidt
2013 J jnl
IEEE Trans. Educ.
James McLurkin, Joshua Rykowski, Meagan John, Quillan Kaseman, Andrew J. Lynch
2012 conf
DARS
Sailesh Prabhu, William Li, James McLurkin
2012 conf
DARS
Golnaz Habibi, James McLurkin
2012 Misc conf
FLAIRS
Ebrima Jobe, James McLurkin, Chutima Boonthum-Denecke
2012 C conf
WAFR
Alejandro Cornejo, Andrew J. Lynch, Elizabeth Fudge, Siegfried Bilstein, Majid Khabbazian, James McLurkin
2011 A* conf
ICRA
Emma Campbell, Zhao Chad Kong, William Hered, Andrew J. Lynch, Marcia K. O'Malley, James McLurkin
2011 conf
AAAI Spring Symposium: Multirobot Systems and Physical Data Structures
Dylan A. Shell, James McLurkin
2011 J jnl
AI Mag.
Mark Buller, Paul Cuddihy, Ernest Davis, Patrick Doherty, Finale Doshi-Velez, Esra Erdem, Douglas H. Fisher, Nancy L. Green, Knut Hinkelmann, Mary Lou Maher, James McLurkin, Rajiv T. Maheswaran, Sara Rubinelli, Nathan Schurr, Donia Scott, Dylan A. Shell, Pedro A. Szekely, Barbara Thönssen, Arnold B. Urken
2010 conf
DARS
James McLurkin, Andrew J. Lynch, Scott Rixner, Thomas W. Barr, Alvin Chou, Kathleen Foster, Siegfried Bilstein
2010 A conf
IROS
Fayette Shaw, Albert Chiu, James McLurkin
2010 J jnl
Neural Comput. Appl.
Jonathan Bachrach, Jacob Beal, James McLurkin
2009 A conf
IROS
James McLurkin, Erik D. Demaine
2008
James McLurkin
2008 conf
ISER
Mac Schwager, James McLurkin, Jean-Jacques E. Slotine, Daniela Rus
2008 conf
DARS
James McLurkin
2008 conf
AAMAS (3)
Jonathan Bachrach, James McLurkin, Anthony Grue
2007 conf
IPSN
James McLurkin
2006 conf
Robotics: Science and Systems
Mac Schwager, James McLurkin, Daniela Rus
2006 conf
AAAI Spring Symposium: To Boldly Go Where No Human-Robot Team Has Gone Before
James McLurkin, Jennifer Smith, James Frankel, David Sotkowitz, David Blau, Brian Schmidt
2005 conf
Robotics: Science and Systems
James McLurkin, Daniel Yamins
2004 conf
DARS
James McLurkin, Jennifer Smith
redb/extractors/decompiler/bninja/arch/x86.py
← Index redb/extractors/decompiler/bninja/arch/x86.py python
from binaryninja.enums import (
    InstructionTextTokenType,
)

# Support both package and standalone imports
try:
    from .architecture import Architecture
except ImportError:
    # Fallback to absolute imports (for multiprocessing spawned processes)
    from redb.extractors.decompiler.bninja.arch.architecture import Architecture


class Arch_x86(Architecture):
    """The concrete class for architecture-dependent details for x86_64"""

    def __init__(self):
        # general purpose registers for 64bits
        self.gpr_64 = [
            "RAX",
            "RBX",
            "RCX",
            "RDX",
            "RSI",
            "RDIR9",
            "R10",
            "R11",
            "R12",
            "R13",
            "R14",
            "R15",
        ]

        self.gpr_32 = [
            "EAX",
            "EBX",
            "ECX",
            "EDX",
            "ESI",
            "EDI",
            "R8D",
            "R9D",
            "R10D",
            "R11D",
            "R12D",
            "R13D",
            "R14D",
            "R15D",
        ]

        self.gpr_16 = [
            "AX",
            "BX",
            "CX",
            "DX",
            "SI",
            "DI",
            "R8W",
            "R9W",
            "R10W",
            "R11W",
            "R12W",
            "R13W",
            "R14W",
            "R15W",
        ]

        self.gpr_8 = [
            "AL",
            "BL",
            "CL",
            "DL",
            "SIL",
            "DIL",
            "R8B",
            "R9B",
            "R10B",
            "R11B",
            "R12B",
            "R13B",
            "R14B",
            "R15B",
        ]

        self.fpu_x87 = ["ST0", "ST1", "ST2", "ST3", "ST4", "ST5", "ST6", "ST7"]

        self.sse_xmm = [
            "XMM0",
            "XMM1",
            "XMM2",
            "XMM3",
            "XMM4",
            "XMM5",
            "XMM6",
            "XMM7",
            "XMM8",
            "XMM9",
            "XMM10",
            "XMM11",
            "XMM12",
            "XMM13",
            "XMM14",
            "XMM15",
        ]

        self.avx_ymm = [
            "YMM0",
            "YMM1",
            "YMM2",
            "YMM3",
            "YMM4",
            "YMM5",
            "YMM6",
            "YMM7",
            "YMM8",
            "YMM9",
            "YMM10",
            "YMM11",
            "YMM12",
            "YMM13",
            "YMM14",
            "YMM15",
        ]
        self.flags = ["FLAGS", "EFLAGS", "RFLAGS"]
        self.stack_registers = ["RBP", "RSP", "SP", "BP"]
        self.size = 8
        self.global_registers = (
            self.gpr_64
            + self.gpr_32
            + self.gpr_16
            + self.gpr_8
            + self.fpu_x87
            + self.sse_xmm
            + self.avx_ymm
        )
        self.opcode_categories = self._initialize_opcode_categories()

        ## instructions
        self.instructions = []

    def is_register(self, register):
        register = register.upper()
        return register in self.global_registers

    def is_general_purpose_register(self, register):
        register = register.upper()
        return (
            register in self.gpr_64
            or register in self.gpr_32
            or register in self.gpr_16
            or register in self.gpr_8
        )

    def is_stack_register(self, register):
        register = register.upper()
        return register in self.stack_registers

    def is_xmm_register(self, register):
        register = register.upper()
        return register in self.sse_xmm

    def is_control_flow(self, instr_tokens):
        return False

    def is_control_flow_instruction(self, instr_tokens):
        """Check if an instruction is a control flow instruction (jump, call, return, loop)."""
        try:
            # Extract the mnemonic from the instruction tokens
            mnemonic = None
            for token in instr_tokens:
                if token.type == InstructionTextTokenType.InstructionToken:
                    mnemonic = token.text.upper()
                    break

            if not mnemonic:
                return False

            # Check if it's a jump, call, return, or loop instruction
            return (
                mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
                or mnemonic == "CALL"  # Function calls
                or mnemonic == "RET"  # Return
                or mnemonic == "RETN"  # Another form of return
                or mnemonic.startswith("LOOP")
            )  # Loop instructions

        except Exception as e:
            print(e)
            # If we can't determine, assume it's not a control flow instruction
            return False

    def is_control_flow_instruction_by_mnemonic(self, mnemonic):
        """Check if an instruction is a control flow instruction based on its mnemonic."""
        if not mnemonic:
            return False

        mnemonic = mnemonic.upper()
        return (
            mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
            or mnemonic == "CALL"  # Function calls
            or mnemonic == "RET"  # Return
            or mnemonic == "RETN"  # Another form of return
            or mnemonic.startswith("LOOP")
        )

    def _initialize_opcode_categories(self):
        """Initialize mapping of opcodes to categories similar to Ghidra's implementation."""
        opcode_categories = {}
        opcode_index = {}  # Add this to mimic Ghidra's opcodeIndex

        # Define common opcodes array similar to Ghidra's COMMON_OPCODES
        COMMON_OPCODES = [
            # Core instructions (tracked individually)
            "MOV",
            "PUSH",
            "POP",
            "LEA",
            "CALL",
            "RET",  # Data movement and control
            "ADD",
            "SUB",
            "MUL",
            "DIV",  # Basic arithmetic
            "AND",
            "OR",
            "XOR",
            "NOT",  # Logical operations
            "JMP",
            "JE",
            "JNE",  # Basic jumps
            "TEST",
            "CMP",  # Comparisons
            # Grouped categories (aggregated tracking)
            "SIMD_MOVE",  # MOVAPS, MOVDQA, MOVDQU, etc.
            "COND_JUMP_EXT",  # Other conditional jumps (JG, JL, JGE, etc.)
            "STRING_OP",  # MOVS, STOS, LODS, SCAS, CMPS
            "STACK_ADV",  # ENTER, LEAVE, PUSHA, POPA
            "ARITHMETIC_ADV",  # IMUL, IDIV, ADC, SBB
            "BIT_OP",  # SHL, SHR, SAR, ROL, ROR, etc.
            "FPU_OP",  # FLD, FST, FADD, etc.
            "SYSTEM_OP",  # SYSCALL, INT, SYSENTER
            "CRYPTO_OP",  # AES*, SHA* instructions
            "MISC_OP",  # Rare but interesting (CPUID, RDTSC, etc.)
        ]

        # Create index map like Ghidra
        for i, opcode in enumerate(COMMON_OPCODES):
            opcode_index[opcode] = i

        # Now categorize opcodes using if/elif/else structure like in Ghidra
        for opcode in COMMON_OPCODES:
            # String Operations (checking these first to avoid MOV confusion)
            if opcode.startswith("MOVS") or opcode in [
                "STOS",
                "LODS",
                "SCAS",
                "CMPS",
                "REP",
                "REPE",
                "REPNE",
            ]:
                opcode_categories[opcode] = "STRING_MANIPULATION"

            # Data Movement (after string ops to avoid MOVS confusion)
            elif opcode.startswith("MOV") or opcode in ["LEA", "XCHG"]:
                opcode_categories[opcode] = "DATA_MOVEMENT"

            # Stack Operations
            elif opcode in ["PUSH", "POP", "ENTER", "LEAVE", "PUSHA", "POPA"]:
                opcode_categories[opcode] = "STACK_MANAGEMENT"

            # Control Flow (non-conditional)
            elif opcode in ["JMP", "CALL", "RET"]:
                opcode_categories[opcode] = "CONTROL_FLOW"

            # Conditional Jumps and Loops
            elif opcode.startswith("J") or opcode.startswith("LOOP"):
                opcode_categories[opcode] = "CONDITIONAL_JUMP"

            # Arithmetic
            elif opcode in [
                "ADD",
                "SUB",
                "MUL",
                "DIV",
                "IMUL",
                "IDIV",
                "ADC",
                "SBB",
                "INC",
                "DEC",
                "NEG",
            ]:
                opcode_categories[opcode] = "ARITHMETIC"

            # Logical
            elif opcode in ["AND", "OR", "XOR", "NOT", "TEST", "CMP"]:
                opcode_categories[opcode] = "LOGICAL"

            # Shifts & Rotates
            elif opcode in ["SHL", "SHR", "SAR", "SAL", "ROL", "ROR", "RCL", "RCR"]:
                opcode_categories[opcode] = "SHIFT_ROTATE"

            # System & Interrupts
            elif opcode in [
                "SYSCALL",
                "INT",
                "SYSENTER",
                "SYSEXIT",
                "SGDT",
                "SIDT",
                "SLDT",
                "WRMSR",
                "RDMSR",
            ]:
                opcode_categories[opcode] = "SYSTEM_CALLS"

            # Floating Point
            elif opcode.startswith("F"):
                opcode_categories[opcode] = "FPU_ARITHMETIC"

            # System Information and Random Number Generation
            elif opcode in ["PUSHF", "POPF", "CPUID", "RDTSC", "RDRAND", "RDSEED"]:
                opcode_categories[opcode] = "CPU_FEATURES"

            # Cryptography
            elif opcode.startswith("AES") or opcode.startswith("SHA"):
                opcode_categories[opcode] = "CRYPTOGRAPHIC"

            # Miscellaneous (including flag operations)
            else:
                opcode_categories[opcode] = "MISC"

        # Additional categorization for opcodes not in COMMON_OPCODES
        # This can be used in the normalize_opcode method

        # Store both maps as instance variables
        # self.opcode_categories = opcode_categories
        self.opcode_index = opcode_index

        return opcode_categories

    def is_simd_register(self, register):
        return register in self.sse_xmm