James Jacob

22 papers A 1Misc 12Journal 7Unranked 2
YearRankTypeTitle / Venue / Authors
2016 J jnl
Improving spatial transferability of ecological niche model of Hevea brasiliensis using pooled occurrences of introduced ranges in two biogeographic regions of India.
Ecol. Informatics
Debabrata Ray, Mukunda Dev Behera, James Jacob
2000 J jnl
Line coverage of path delay faults.
IEEE Trans. Very Large Scale Integr. Syst.
Ananta K. Majhi, V. D. Agrawak, James Jacob, Lalit M. Patnaik
1998 Misc conf
A Fast Two-level Logic Minimizer.
VLSI Design
P. Srinivasa Rao, James Jacob
1998 Misc conf
Optimizing Logic Design Using Boolean Transforms.
VLSI Design
Pramit Chavda, James Jacob, Vishwani D. Agrawal
1997 Misc conf
Adder and Comparator Synthesis with Exclusive-OR Transform of Inputs.
VLSI Design
James Jacob, P. Srinivas Sivakumar, Vishwani D. Agrawal
1996 J jnl
A Novel Path Delay Fault Simulator Using Binary Logic.
VLSI Design
Ananta K. Majhi, James Jacob, Lalit M. Patnaik
1996 Misc conf
Cubical CAMP for minimization of Boolean functions.
VLSI Design
Nripendra N. Biswas, C. Srikanth, James Jacob
1996 J jnl
Functional test generation for synchronous sequential circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mandyam-Komar Srinivas, James Jacob, Vishwani D. Agrawal
1996 — conf
Lossless Compression Of Images Using Logic Minimization.
ICIP (1)
Anil K. Chaudhay, Jacob Augustine, James Jacob
1996 Misc conf
On test coverage of path delay faults.
VLSI Design
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vishwani D. Agrawal
1995 Misc conf
An efficient automatic test generation system for path delay faults in combinational circuits.
VLSI Design
Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vishwani D. Agrawal
1995 Misc conf
Functional test generation for non-scan sequential circuits.
VLSI Design
Mandyam-Komar Srinivas, James Jacob, Vishwani D. Agrawal
1995 Misc conf
Logic minimization based approach for compressing image data.
VLSI Design
Jacob Augustine, Wen Feng, James Jacob
1995 J jnl
Switching theoretic approach to image compression.
Signal Process.
Jacob Augustine, Wen Feng, Anamitra Makur, James Jacob
1994 Misc conf
An Improved Deductive Fault Simulator.
VLSI Design
P. R. Suresh Kumar, James Jacob, Mandyam-Komar Srinivas, Vishwani D. Agrawal
1993 Misc conf
Efficient Technique to Reduce Gate Evaluations and Speed Up Fault Simulation.
VLSI Design
P. R. Suresh Kumar, Mandyam-Komar Srinivas, James Jacob
1992 Misc conf
An Efficient Rule Based Fault Simulator.
VLSI Design
Oommen Tharakan, James Jacob, Mandyam-Komar Srinivas
1992 — conf
Finite State Machine Testing Based on Growth and Dissappearance Faults.
FTCS
Mandyam-Komar Srinivas, James Jacob, Vishwani D. Agrawal
1992 Misc conf
Functional Test Generation for Sequential Circuits.
VLSI Design
James Jacob, Vishwani D. Agrawal
1992 J jnl
Multiple fault detection in two-level multi-output circuits.
J. Electron. Test.
James Jacob, Vishwani D. Agrawal
1990 J jnl
Further Comments on "Detection of Faults in Programmable Logic Arrays".
IEEE Trans. Computers
James Jacob, Nripendra N. Biswas
1985 A conf
: A Testable PLA Design with Minimal Hardware and Test Set.
ITC
James Jacob, Nripendra N. Biswas