James D. Balfour

12 papers A* 2A 2B 1Misc 1Journal 5Unranked 1
YearRankTypeTitle / Venue / Authors
2014 — conf
Author retrospective for design tradeoffs for tiled CMP on-chip networks.
ICS 25th Anniversary
William J. Dally, James D. Balfour
2013 B conf
A detailed and flexible cycle-accurate Network-on-Chip simulator.
ISPASS
Nan Jiang, Daniel U. Becker, George Michelogiannakis, James D. Balfour, Brian Towles, David E. Shaw, John Kim, William J. Dally
2010 Misc conf
Fine-grain dynamic instruction placement for L0 scratch-pad memory.
CASES
Jongsoo Park, James D. Balfour, William J. Dally
2009 A* conf
Elastic-buffer flow control for on-chip networks.
HPCA
George Michelogiannakis, James D. Balfour, William J. Dally
2009 J jnl
Operand Registers and Explicit Operand Forwarding.
IEEE Comput. Archit. Lett.
James D. Balfour, R. C. Halting, William J. Dally
2008 J jnl
An Energy-Efficient Processor Architecture for Embedded Systems.
IEEE Comput. Archit. Lett.
James D. Balfour, William J. Dally, David Black-Schaffer, Vishal Parikh, Jongsoo Park
2008 J jnl
Efficient Embedded Computing.
Computer
William J. Dally, James D. Balfour, David Black-Schaffer, James Chen, R. Curtis Harting, Vishal Parikh, Jongsoo Park, David Sheffield
2008 J jnl
Hierarchical Instruction Register Organization.
IEEE Comput. Archit. Lett.
David Black-Schaffer, James D. Balfour, William J. Dally, Vishal Parikh, Jongsoo Park
2007 A* conf
Flattened Butterfly Topology for On-Chip Networks.
MICRO
John Kim, James D. Balfour, William J. Dally
2007 J jnl
Flattened Butterfly Topology for On-Chip Networks.
IEEE Comput. Archit. Lett.
John Kim, James D. Balfour, William J. Dally
2007 A conf
Register pointer architecture for efficient embedded processors.
DATE
Jongsoo Park, Sung-Boem Park, James D. Balfour, David Black-Schaffer, Christos Kozyrakis, William J. Dally
2006 A conf
Design tradeoffs for tiled CMP on-chip networks.
ICS
James D. Balfour, William J. Dally