James A. Bain

17 papers A* 2Misc 1Journal 7Unranked 7
YearRankTypeTitle / Venue / Authors
2026 A* conf
HPCA
Minh S. Q. Truong, Yiqiu Sun, Dawei Xiong, Amol Shah, Alexander Glass, Abraham Farrell, James A. Bain, L. Richard Carley, Saugata Ghose
2022 J jnl
IEEE J. Emerg. Sel. Topics Circuits Syst.
Minh S. Q. Truong, Liting Shen, Alexander Glass, Alison Hoffmann, L. Richard Carley, James A. Bain, Saugata Ghose
2021 A* conf
MICRO
Minh S. Q. Truong, Eric Chen, Deanyone Su, Liting Shen, Alexander Glass, L. Richard Carley, James A. Bain, Saugata Ghose
2019 conf
DRC
Yuezhang Zou, Darshil K. Gala, James A. Bain
2018 conf
DRC
Dasheng Li, Georg Ramer, Phoebe Yeoh, Brian Hoskins, Yuanzhi Ma, James A. Bain, Andrea Centrone, Marek Skowronski
2016 J jnl
IEEE J. Sel. Areas Commun.
Yongjune Kim, Abhishek A. Sharma, Robert Mateescu, Seung-Hwan Song, Zvonimir Z. Bandic, James A. Bain, B. V. K. Vijaya Kumar
2016 conf
ICC
Yongjune Kim, Abhishek A. Sharma, Robert Mateescu, Seung-Hwan Song, Zvonimir Z. Bandic, James A. Bain, B. V. K. Vijaya Kumar
2016 J jnl
CoRR
Yongjune Kim, Abhishek A. Sharma, Robert Mateescu, Seung-Hwan Song, Zvonimir Z. Bandic, James A. Bain, B. V. K. Vijaya Kumar
2015 conf
LASCAS
Thomas C. Jackson, Abhishek A. Sharma, James A. Bain, Jeffrey A. Weldon, Lawrence T. Pileggi
2015 conf
ESSDERC
Abhishek A. Sharma, Marek Skowronski, James A. Bain, Jeffrey A. Weldon
2015 J jnl
IEEE J. Emerg. Sel. Topics Circuits Syst.
Thomas C. Jackson, Abhishek A. Sharma, James A. Bain, Jeffrey A. Weldon, Lawrence T. Pileggi
2010 J jnl
Proc. IEEE
David S. Ricketts, James A. Bain, Yi Luo, Ronald D. Blanton, Kenneth Mai, Gary K. Fedder
2008 conf
ICC
Sheida Nabavi, B. V. K. Vijaya Kumar, James A. Bain
2005 conf
ICIP (3)
Jin Xie, Ahmet Kaya, James A. Bain, B. V. K. Vijaya Kumar
2001 J jnl
IEEE Trans. Educ.
Jonathan P. Van't Hof, James A. Bain, Robert M. White, Jian-Gang Zhu
2001 J jnl
IEEE J. Sel. Areas Commun.
Fatih Sarigoz, Hongwei Song, B. V. K. Vijaya Kumar, James A. Bain
2000 Misc conf
ICASSP
Fatih Sarigoz, B. V. K. Vijaya Kumar, James A. Bain
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False