Jai Gopal Pandey

39 papers C 1Misc 6Journal 9Unranked 23

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	An Error-Resilient Area-Efficient Ultra-Low-Power 4-Bit Flash ADC Design with Multi-Vt Transistors. LASCAS Riyanka Banerjee, Jay Nangia, M. Santosh, Jai Gopal Pandey
2026	J	`jnl`	Energy and performance efficient NAND flash translation layer architecture for low-latency edge applications. J. Parallel Distributed Comput. Ranjeeth Sekhar, Diksha Shekhawat, Jugal Gandhi, M. Santosh, Jai Gopal Pandey
2025	J	`jnl`	An Efficient Hardware Implementation of Elliptic Curve Point Multiplication over GF(2 CoRR Ruby Kumari, Tapas Rout, Babul Saini, Jai Gopal Pandey, Abhijit Karmakar
2025	—	`conf`	Bridging Cryptographic Robustness and Hardware Efficiency: A Comprehensive Analysis of S-Box Design Methodologies for SoC Integration. MCSoC Maitri Iyer, Jai Gopal Pandey
2025	C	`conf`	DyLock: A Dynamic Key-based SAT and Structural Attacks Resilient Low-overhead Logic Locking. ISCAS Jugal Gandhi, Diksha Shekhawat, Jaya Dofe, Jai Gopal Pandey
2025	—	`conf`	Hardware Trojan Detection with Machine Learning and Power Side-Channels: A Post-Deployment Analysis. CNS Ashwin Koshy John, Sai Tarrun Pitta, Jaya Dofe, Jai Gopal Pandey
2025	Misc	`conf`	SHAKTI: Securing Hardware IPs by Cascade Gated Multiplexer-Based Logic Obfuscation. VLSID Jugal Gandhi, Nikhil Handa, Abhay Nayak, Diksha Shekhawat, M. Santosh, Jaya Dofe, Jai Gopal Pandey
2024	Misc	`conf`	Design and Analysis of an Area and Power Efficient Programmable Delay Cell. VLSID Kuntal Chakraborty, Jai Gopal Pandey, Abir J. Mondal
2024	—	`conf`	Emerging Frontiers and Limitations of Logic Locking for Secure IC Design. MCSoC Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey
2024	—	`conf`	Large Language Model Driven Logic Locking: A Generative Approach to Secure IC Design. ATS Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jaya Dofe, Jai Gopal Pandey
2024	J	`jnl`	Modeling, hardware architecture, and performance analyses of an AEAD-based lightweight cipher. J. Real Time Image Process. Kartik Jhawar, Jugal Gandhi, Diksha Shekhawat, Aniket Upadhyay, Avadh Harkishanka, Nitin Chaturvedi, M. Santosh, Jai Gopal Pandey
2024	Misc	`conf`	SAT and SCOPE Attacks on Deceptive Multiplexer Logic Locking. VLSID Jugal Gandhi, Rishi Agarwal, Anish Mall, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey
2024	—	`conf`	Security Assessment of Rotation Countermeasure for Protection Against Fault Attacks. VDAT Maitri Iyer, Rishav Bhowmick, Harsh Singh, Jai Gopal Pandey
2023	J	`jnl`	An RTL Implementation of the Data Encryption Standard (DES). CoRR Ruby Kumari, Jai Gopal Pandey, Abhijit Karmakar
2023	—	`conf`	LOKI: A Secure FPGA Prototyping of IoT IP with Lightweight Logic Locking. APCCAS Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey
2023	J	`jnl`	Logic locking for IP security: A comprehensive analysis on challenges, techniques, and trends. Comput. Secur. Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey
2023	—	`conf`	PHAc: Posit Hardware Accelerator for Efficient Arithmetic Logic Operations. CoNGA Diksha Shekhawat, Jugal Gandhi, M. Santosh, Jai Gopal Pandey
2023	—	`conf`	Security Evaluation of Lightweight SBoxes. iSES Jugal Gandhi, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey
2022	—	`conf`	An Overlap-and-Add Based Time Domain Acceleration of CNNs on FPGA-CPU Systems. VDAT Rudresh Pratap Singh, Shreyam Kumar, Jai Gopal Pandey
2021	—	`conf`	A Hardware Generator for Posit Arithmetic and its FPGA Prototyping. VDAT Diksha Shekhawat, Apoorva Jangir, Jai Gopal Pandey
2021	J	`jnl`	An embedded FPGA-SoC framework and its usage in moving object tracking application. Des. Autom. Embed. Syst. Jai Gopal Pandey
2021	J	`jnl`	GIFT cipher usage in image data security: hardware implementations, performance and statistical analyses. J. Real Time Image Process. Apoorva Jangir, Jai Gopal Pandey
2020	—	`conf`	A Highly Stable and Robust 7T SRAM Cell using Memristor. VDAT Sahan Panguluru, Jai Gopal Pandey
2020	—	`conf`	A Lightweight VLSI Architecture for RECTANGLE Cipher and its Implementation on an FPGA. VDAT Jai Gopal Pandey, Ayush Laddha, Sashwat Deb Samaddar
2020	—	`conf`	A Unified Architecture for AES/PRESENT Ciphers and its Usage in an SoC Environment. LASCAS Jai Gopal Pandey, Sanskriti Gupta, Abhijit Karmakar
2019	—	`conf`	A Novel Design of SRAM Using Memristors at 45 nm Technology. VDAT Victor Jeffry Louis, Jai Gopal Pandey
2019	—	`conf`	An RNS Implementation of the Elliptic Curve Cryptography for IoT Security. TPS-ISA Jai Gopal Pandey, Chhavi Mitharwal, Abhijit Karmakar
2019	—	`conf`	An Ultra Low Power AES Architecture for IoT. VDAT Sajid Khan, Neha Gupta, Gopal Raut, Gunjan Rajput, Jai Gopal Pandey, Santosh Kumar Vishvakarma
2019	J	`jnl`	An ultra-low power, reconfigurable, aging resilient RO PUF for IoT applications. Microelectron. J. Sajid Khan, Ambika Prasad Shah, Neha Gupta, Shailesh Singh Chouhan, Jai Gopal Pandey, Santosh Kumar Vishvakarma
2019	—	`conf`	Dual-Edge Triggered Lightweight Implementation of AES for IoT Security. VDAT Sajid Khan, Neha Gupta, Abhinav Vishwakarma, Shailesh Singh Chouhan, Jai Gopal Pandey, Santosh Kumar Vishvakarma
2019	J	`jnl`	Hardware architectures for PRESENT block cipher and their FPGA implementations. IET Circuits Devices Syst. Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar
2018	—	`conf`	A High-Performance VLSI Architecture of the Present Cipher and its Implementations for SoCs. SoCC Jai Gopal Pandey, Tarun Goel, Mausam Nayak, Chhavi Mitharwal, Abhijit Karmakar, Raj Singh
2018	Misc	`conf`	A High-Performance and Area-Efficient VLSI Architecture for the PRESENT Lightweight Cipher. VLSID Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar
2018	—	`conf`	A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC Implementations. VDAT Jai Gopal Pandey, Tarun Goel, Mausam Nayak, Chhavi Mitharwal, Sajid Khan, Santosh Kumar Vishvakarma, Abhijit Karmakar, Raj Singh
2017	—	`conf`	An Efficient VLSI Architecture for PRESENT Block Cipher and Its FPGA Implementation. VDAT Jai Gopal Pandey, Tarun Goel, Abhijit Karmakar
2015	Misc	`conf`	An FPGA-Based Architecture for Local Similarity Measure for Image/Video Processing Applications. VLSID Jai Gopal Pandey, Arindam Karmakar, Chandra Shekhar, S. Gurunarayanan
2015	—	`conf`	An embedded framework for accurate object localization using center of gravity measure with mean shift procedure. VDAT Jai Gopal Pandey, Arindam Karmakar, Chandra Shekhar, S. Gurunarayanan
2014	Misc	`conf`	A Novel Architecture for FPGA Implementation of Otsu's Global Automatic Image Thresholding Algorithm. VLSID Jai Gopal Pandey, Arindam Karmakar, Chandra Shekhar, S. Gurunarayanan
2014	—	`conf`	Architectures and algorithms for image and video processing using FPGA-based platform. VDAT Jai Gopal Pandey, Arindam Karmakar, S. Gurunarayanan