Jagpreet Singh

26 papers A 1B 1C 3Misc 2Journal 15Unranked 4
YearRankTypeTitle / Venue / Authors
2026 J jnl
IEEE Trans. Consumer Electron.
Vishal Krishna Singh, Jagpreet Singh, Rajkumar Singh Rathore, Devansh Nema
2025 Misc conf
SenSys
Sahil Kumar, Asad Alam, Shiva Koshta, Jagpreet Singh
2025 conf
HiPCW
Harasees Kaur, Sankalp Shashi, Umesh Konduru, Sahil Kumar, Balwinder Sodhi, Jagpreet Singh, B. S. Sanjeev
2025 Misc conf
SenSys
Sahil Kumar, Jagpreet Singh, Amit Kumar Dhar, Vishal Krishna Singh
2025 J jnl
IEEE Trans. Netw. Serv. Manag.
Madhu Donipati, Ankur Jaiswal, Abhishek Hazra, Nabajyoti Mazumdar, Jagpreet Singh
2024 J jnl
Concurr. Comput. Pract. Exp.
Sanchit, Navjot Singh, Jagpreet Singh
2024 J jnl
IEEE Trans. Consumer Electron.
Ankur Jaiswal, Akash Kumar, Abhishek Hazra, Nabajyoti Mazumdar, Jagpreet Singh
2024 J jnl
IEEE Trans. Green Commun. Netw.
Ankur Jaiswal, Salla Shivateja, Abhishek Hazra, Nabajyoti Mazumdar, Jagpreet Singh, Varun G. Menon
2023 J jnl
IEEE Access
Sanchit, Navjot Singh, Jagpreet Singh
2022 A conf
MSWiM
Akash Kumar, Jagpreet Singh
2022 J jnl
Concurr. Comput. Pract. Exp.
Manoj Kumar, Sukhwinder Singh Sran, Lakhwinder Kaur, Jagpreet Singh
2020 J jnl
IEEE Access
Manoj Kumar, Lakhwinder Kaur, Jagpreet Singh
2020 J jnl
CoRR
Maciej Besta, Dimitri Stanojevic, Tijana Zivic, Jagpreet Singh, Maurice Hoerold, Torsten Hoefler
2020 J jnl
J. Comb. Optim.
Amit Kumar Dhar, Raghunath Reddy Madireddy, Supantha Pandit, Jagpreet Singh
2019 C conf
TAMC
Amit Kumar Dhar, Raghunath Reddy Madireddy, Supantha Pandit, Jagpreet Singh
2019 J jnl
IEEE Access
Manvendra Dattatrey, Abhishek Kumar Tiwari, Bibhas Ghoshal, Jagpreet Singh
2018 J jnl
Int. J. Sens. Networks
Sukhwinder Singh Sran, Jagpreet Singh, Lakhwinder Kaur
2018 B conf
PACT
Maciej Besta, Dimitri Stanojevic, Tijana Zivic, Jagpreet Singh, Maurice Hoerold, Torsten Hoefler
2018 J jnl
IEEE Trans. Green Commun. Netw.
Sukhwinder Singh Sran, Jagpreet Singh, Lakhwinder Kaur
2016 C conf
PDCAT
Jagpreet Singh, Aditya Gujral, Harmandeep Singh, Jag Ustit Singh, Nitin Auluck
2015 J jnl
IEEE Trans. Parallel Distributed Syst.
Jagpreet Singh, Sandeep Betha, Bhargav Mangipudi, Nitin Auluck
2015 C conf
JSSPP
Jagpreet Singh, Nitin Auluck
2015 J jnl
CoRR
Jagpreet Singh, Satish Arora
2014 conf
SpringSim (HPS)
Jagpreet Singh, Nitin Auluck
2012 conf
PAAP
Jagpreet Singh, Bhargav Mangipudi, Sandeep Betha, Nitin Auluck
2009 conf
NetCoM
Anu Bala, Munish Bansal, Jagpreet Singh
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False