Jaehyeok Yang

18 papers Journal 9Unranked 9
YearRankTypeTitle / Venue / Authors
2026 — conf
15.9 A 48Gb/s 24Gb GDDR7 DRAM for Mid-Range Inference AI with Symmetric 2CH-Mode Operation, Clock-Path Optimization, and RAS Features.
ISSCC
Hyunsu Park, Sungkwon Lee, Kyunghoon Kim, Jin-Youp Cha, Hyeongjun Ko, Jaehyeok Yang, Seongjin Kim, Youngtaek Kim, Minsoo Park, Gangsik Lee, Keonho Lee, Sanghoon Lee, Jiseok Lee, Gyunam Jeon, Sera Jeong, Yongsuk Joo, Jaehoon Cha, Seonwoo Hwang, Seulgi Kim, Eunji Song, Junghwan Ji, Byungjun Kang, Boram Kim, Sang-Yeon Byeon, Hankyu Chi, Hyungsoo Kim, Jonghwan Kim
2025 J jnl
N-gram opcode frequency based malware detection using CNN algorithm.
Soft Comput.
Seok Min Ko, Jaehyeok Yang, TaeGuen Kim, Ilsun You
2024 — conf
13.1 A 35.4Gb/s/pin 16Gb GDDR7 with a Low-Power Clocking Architecture and PAM3 IO Circuitry.
ISSCC
Jaehyeok Yang, Hyeongjun Ko, Kyunghoon Kim, Hyunsu Park, Jihwan Park, Ji-Hyo Kang, Jin-Youp Cha, Seongjin Kim, Youngtaek Kim, Minsoo Park, Gangsik Lee, Keonho Lee, Sanghoon Lee, Gyunam Jeon, Sera Jeong, Yongsuk Joo, Jaehoon Cha, Seonwoo Hwang, Boram Kim, Sang-Yeon Byeon, Sungkwon Lee, Hyeonyeol Park, Joohwan Cho, Jonghwan Kim
2022 J jnl
A 24-Gb/s/Pin 8-Gb GDDR6 With a Half-Rate Daisy-Chain-Based Clocking Architecture and I/O Circuitry for Low-Noise Operation.
IEEE J. Solid State Circuits
Jihyo Kang, Jaehyeok Yang, Kyunghoon Kim, Joo-Hyung Chae, Gang-Sik Lee, Sang-Yeon Byeon, Boram Kim, Dong-Hyun Kim, Youngtaek Kim, Yeongmuk Cho, Junghwan Ji, Sera Jeong, Jaehoon Cha, Minsoo Park, Hongdeuk Kim, Sijun Park, Sunho Kim, Hae-Kang Jung, Jieun Jang, Sangkwon Lee, Hyungsoo Kim, Joo-Hwan Cho, Junhyun Chun, Seon-Yong Cha
2021 — conf
A 24Gb/s/pin 8Gb GDDR6 with a Half-Rate Daisy-Chain-Based Clocking Architecture and IO Circuitry for Low-Noise Operation.
ISSCC
Kyunghoon Kim, Joo-Hyung Chae, Jaehyeok Yang, Jihyo Kang, Gang-Sik Lee, Sang-Yeon Byeon, Youngtaek Kim, Boram Kim, Dong-Hyun Kim, Yeongmuk Cho, Kangmoo Choi, Hyeongyeol Park, Junghwan Ji, Sera Jeong, Yongsuk Joo, Jaehoon Cha, Minsoo Park, Hongdeuk Kim, Sijun Park, Kyubong Kong, Sunho Kim, Sangkwon Lee, Junhyun Chun, Hyungsoo Kim, Seon-Yong Cha
2020 J jnl
A Framed-Pulsewidth Modulation Transceiver for High-Speed Broadband Communication Links.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sejun Jeon, Woohyun Kwon, Jong-Hyeok Yoon, Taehun Yoon, Kyeongha Kwon, Jaehyeok Yang, Hyeon-Min Bae
2019 J jnl
Reference-Less Time-Division Duplex Transceiver IC for a Renal Denervation System.
IEEE J. Solid State Circuits
Jaehyeok Yang, Seohyeon Kim, Gunpil Hwang, Kyeongha Kwon, Sejun Jeon, Hyeon-Min Bae
2018 — conf
A 20Gb/s transceiver with framed-pulsewidth modulation in 40nm CMOS.
ISSCC
Sejun Jeon, Woohyun Kwon, Taehun Yoon, Jong-Hyeok Yoon, Kyeongha Kwon, Jaehyeok Yang, Hyeon-Min Bae
2018 — conf
A 28Gb/s transceiver with chirp-managed EDC for DML systems.
ISSCC
Kyeongha Kwon, Jong-Hyeok Yoon, Hanho Choi, Younho Jeon, Jaehyeok Yang, Bongjin Kim, Soon-Won Kwon, Minsik Kim, Sejun Jeon, Hyosup Won, Hyeon-Min Bae
2018 — conf
A Reference-Less Time-Division-Duplex Transceiver IC for a 5-Fr 6-Electrode Renal Denervation Catheter in 0.18-μm 70-V BCDMOS.
EMBC
Jaehyeok Yang, Seohyeon Kim, Gunpil Hwang, Kyeongha Kwon, Sejun Jeon, Hyeon-Min Bae
2017 J jnl
A 2.048 Mb/s Full-Duplex Free-Space Optical Transceiver IC for a Real-Time In Vivo Brain-Computer Interface Mouse Experiment Under Social Interaction.
IEEE J. Solid State Circuits
Gunpil Hwang, Jongkwan Choi, Jaehyeok Yang, Sungmin Lim, Jae-Myoung Kim, MinGyu Choi, Kiuk Gwak, Jinwoo Jeon, Il-Hwan Choi, Sol Park, Dae-Shik Kim, Hee Sup Shin, Hyeon-Min Bae
2016 — conf
A 2.048 Mb/s full-duplex free-space optical transceiver IC for a real-time in vivo neurofeedback mouse experiment under social interaction.
VLSI Circuits
Gunpil Hwang, Jongkwan Choi, Jaehyeok Yang, Sungmin Lim, Jae-Myoung Kim, MinGyu Choi, Dae-Shik Kim, Kiuk Gwak, Jinwoo Jeon, Hee Sup Shin, Il-Hwan Choi, Sol Park, Hyeon-Min Bae
2016 J jnl
A 4×10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Joon-Yeong Lee, Jaehyeok Yang, Jong-Hyeok Yoon, Soon-Won Kwon, Hyosup Won, Jinho Han, Hyeon-Min Bae
2016 J jnl
Time-Divided Spread-Spectrum Code-Based 400 fW-Detectable Multichannel fNIRS IC for Portable Functional Brain Imaging.
IEEE J. Solid State Circuits
Jongkwan Choi, Jae-Myoung Kim, Gunpil Hwang, Jaehyeok Yang, MinGyu Choi, Hyeon-Min Bae
2015 — conf
11.1 A time-divided spread-spectrum code based 15pW-detectable multi-channel fNIRS IC for portable functional brain imaging.
ISSCC
Jongkwan Choi, Jae-Myoung Kim, Gunpil Hwang, Jaehyeok Yang, MinGyu Choi, Hyeon-Min Bae
2014 — conf
8.1 A 6Gb/s transceiver with a nonlinear electronic dispersion compensator for directly modulated distributed-feedback lasers.
ISSCC
Kyeongha Kwon, Jong-Hyeok Yoon, Soon-Won Kwon, Jaehyeok Yang, Joon-Yeong Lee, Hyosup Won, Hyeon-Min Bae
2014 J jnl
Phase-Rotator-Based All-Digital Phase-Locked Loop for a Spread-Spectrum Clock Generator.
IEEE Trans. Circuits Syst. II Express Briefs
Jaehyeok Yang, Joon-Yeong Lee, Sun-Jae Lim, Hyeon-Min Bae
2012 J jnl
Analysis of a Frequency Acquisition Technique With a Stochastic Reference Clock Generator.
IEEE Trans. Circuits Syst. II Express Briefs
Jinho Han, Jaehyeok Yang, Hyeon-Min Bae