Jaehoon Yu

60 papers A* 1A 3C 2Misc 1Journal 26Unranked 27
YearRankTypeTitle / Venue / Authors
2026 J jnl
PIM-SHERPA: Software Method for On-device LLM Inference by Resolving PIM Memory Attribute and Layout Inconsistencies.
CoRR
Sunjung Lee, Sanghoon Cha, Hyeonsu Kim, Seungwoo Seo, Yuhwan Ro, Sukhan Lee, Byeongho Kim, Yongjun Park, Kyomin Sohn, Seungwon Lee, Jaehoon Yu
2025 J jnl
Amorphica: A Fully Connected Annealer Supporting Metamorphic Annealing and Scalable Multi Chip Integration.
IEEE Access
Daiki Okonogi, Jaehoon Yu, Satoru Jimbo, Genta Inoue, Akira Hyodo, Kota Ando, Bruno Hideki Fukushima-Kimura, Ryota Yasudo, Thiem Van Chu, Masato Motomura, Kazushi Kawamura
2025 J jnl
WhiteDwarf: A Holistic Co-Design Approach to Ultra-Compact Neural Inference Acceleration.
IEEE Access
Ángel López García-Arias, Yasuyuki Okoshi, Jaehoon Yu, Junnosuke Suzuki, Hikari Otsuka, Kazushi Kawamura, Thiem Van Chu, Daichi Fujiki, Masato Motomura
2024 C conf
Exploration of Hyperdimensional Computing Using Locality-Sensitive Hashing Mechanism on FPGA.
ICCE
Masato Watanabe, Shungo Kumazawa, Thiem Van Chu, Kazushi Kawamura, Jaehoon Yu, Masato Motomura
2024 J jnl
Pianissimo: A Sub-mW Class DNN Accelerator With Progressively Adjustable Bit-Precision.
IEEE Access
Junnosuke Suzuki, Jaehoon Yu, Mari Yasunaga, Ángel López García-Arias, Yasuyuki Okoshi, Shungo Kumazawa, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura
2024 J jnl
The Breakthrough Memory Solutions for Improved Performance on LLM Inference.
IEEE Micro
Byeongho Kim, Sanghoon Cha, Sangsoo Park, Jieun Lee, Sukhan Lee, Shinhaeng Kang, Jinin So, Kyungsoo Kim, Jin Jung, Jong-Geon Lee, Sunjung Lee, Yoonah Paik, Hyeonsu Kim, Jin-Seong Kim, Won-Jo Lee, Yuhwan Ro, Yeongon Cho, Jin Hyun Kim, Joon-Ho Song, Jaehoon Yu, Seungwon Lee, Jeonghyeon Cho, Kyomin Sohn
2024 J jnl
Toward Improving Ensemble-Based Collaborative Inference at the Edge.
IEEE Access
Shungo Kumazawa, Jaehoon Yu, Kazushi Kawamura, Thiem Van Chu, Masato Motomura
2024 — conf
WhiteDwarf: 12.24 TFLOPS/W 40 nm Versatile Neural Inference Engine for Ultra-Compact Execution of CNNs and MLPs Through Triple Unstructured Sparsity Exploitation and Triple Model Compression.
A-SSCC
Yasuyuki Okoshi, Ángel López García-Arias, Jaehoon Yu, Junnosuke Suzuki, Hikari Otsuka, Thiem Van Chu, Kazushi Kawamura, Daichi Fujiki, Masato Motomura
2023 J jnl
A Fully-Parallel Annealing Algorithm with Autonomous Pinning Effect Control for Various Combinatorial Optimization Problems.
IEICE Trans. Inf. Syst.
Daiki Okonogi, Satoru Jimbo, Kota Ando, Thiem Van Chu, Jaehoon Yu, Masato Motomura, Kazushi Kawamura
2023 — conf
A Highly Accurate and Parallel Vision MLP FPGA Accelerator based on FP7/8 SIMD Operations.
MCSoC
Mari Yasunaga, Junnosuke Suzuki, Masato Watanabe, Kazushi Kawamura, Thiem Van Chu, Jaehoon Yu, Masato Motomura
2023 — conf
Amorphica: 4-Replica 512 Fully Connected Spin 336MHz Metamorphic Annealer with Programmable Optimization Strategy and Compressed-Spin-Transfer Multi-Chip Extension.
ISSCC
Kazushi Kawamura, Jaehoon Yu, Daiki Okonogi, Satoru Jimbo, Genta Inoue, Akira Hyodo, Ángel López García-Arias, Kota Ando, Bruno Hideki Fukushima-Kimura, Ryota Yasudo, Thiem Van Chu, Masato Motomura
2023 Misc conf
Decision Forest Training Accelerator Based on Binary Feature Decomposition.
FCCM
Thiem Van Chu, Yu Mizutani, Yuta Nagahara, Shungo Kumazawa, Kazushi Kawamura, Jaehoon Yu, Masato Motomura
2023 — conf
Flexibly Controllable Dynamic Cooling Methods for Solid-State Annealing Processors to Improve Combinatorial Optimization Performance.
COOL CHIPS
Genta Inoue, Daiki Okonogi, Thiem Van Chu, Jaehoon Yu, Masato Motomura, Kazushi Kawamura
2023 — conf
Pianissimo: A Sub-mW Class DNN Accelerator with Progressive Bit-by-Bit Datapath Architecture for Adaptive Inference at Edge.
VLSI Technology and Circuits
Junnosuke Suzuki, Jaehoon Yu, Mari Yasunaga, Ángel López García-Arias, Yasuyuki Okoshi, Shungo Kumazawa, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura
2023 J jnl
Recurrent Residual Networks Contain Stronger Lottery Tickets.
IEEE Access
Ángel López García-Arias, Yasuyuki Okoshi, Masanori Hashimoto, Masato Motomura, Jaehoon Yu
2023 — conf
Samsung PIM/PNM for Transfmer Based AI : Energy Efficiency on PIM/PNM Cluster.
HCS
Jin Hyun Kim, Yuhwan Ro, Jinin So, Sukhan Lee, Shinhaeng Kang, Yeongon Cho, Hyeonsu Kim, Byeongho Kim, Kyungsoo Kim, Sangsoo Park, Jin-Seong Kim, Sanghoon Cha, Won-Jo Lee, Jin Jung, Jonggeon Lee, Jieun Lee, Joon-Ho Song, Seungwon Lee, Jeonghyeon Cho, Jaehoon Yu, Kyomin Sohn
2023 J jnl
TT-MLP: Tensor Train Decomposition on Deep MLPs.
IEEE Access
Jiale Yan, Kota Ando, Jaehoon Yu, Masato Motomura
2022 J jnl
A Hybrid Integer Encoding Method for Obtaining High-Quality Solutions of Quadratic Knapsack Problems on Solid-State Annealers.
IEICE Trans. Inf. Syst.
Satoru Jimbo, Daiki Okonogi, Kota Ando, Thiem Van Chu, Jaehoon Yu, Masato Motomura, Kazushi Kawamura
2022 — conf
APC-SCA: A Fully-Parallel Annealing Algorithm with Autonomous Pinning Effect Control.
IPDPS Workshops
Daiki Okonogi, Satoru Jimbo, Kota Ando, Thiem Van Chu, Jaehoon Yu, Masato Motomura, Kazushi Kawamura
2022 — conf
Hiddenite: 4K-PE Hidden Network Inference 4D-Tensor Engine Exploiting On-Chip Model Construction Achieving 34.8-to-16.0TOPS/W for CIFAR-100 and ImageNet.
ISSCC
Kazutoshi Hirose, Jaehoon Yu, Kota Ando, Yasuyuki Okoshi, Ángel López García-Arias, Junnosuke Suzuki, Thiem Van Chu, Kazushi Kawamura, Masato Motomura
2022 — conf
Investigating Small Device Implementation of FRET-based Optical Reservoir Computing.
MWSCAS
Masafumi Tanakal, Jaehoon Yu, Masaki Nakagawa, Naoya Tate, Masanori Hashimoto
2022 A* conf
Multicoated Supermasks Enhance Hidden Networks.
ICML
Yasuyuki Okoshi, Ángel López García-Arias, Kazutoshi Hirose, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura, Jaehoon Yu
2021 — conf
A High-Performance and Flexible FPGA Inference Accelerator for Decision Forests Based on Prior Feature Space Partitioning.
FPT
Thiem Van Chu, Ryuichi Kitajima, Kazushi Kawamura, Jaehoon Yu, Masato Motomura
2021 — conf
Edge Inference Engine for Deep & Random Sparse Neural Networks with 4-bit Cartesian-Product MAC Array and Pipelined Activation Aligner.
HCS
Kota Ando, Jaehoon Yu, Kazutoshi Hirose, Hiroki Nakahara, Kazushi Kawamura, Thiem Van Chu, Masato Motomura
2021 J jnl
ExtraFerns: Fully Parallel Ensemble Learning Technique with Random Projection and Non-Greedy yet Minimal Memory Access Training.
Int. J. Netw. Comput.
Shungo Kumazawa, Kazushi Kawamura, Thiem Van Chu, Masato Motomura, Jaehoon Yu
2021 A conf
Hidden-Fold Networks: Random Recurrent Residuals Using Sparse Supermasks.
BMVC
Ángel López García-Arias, Masanori Hashimoto, Masato Motomura, Jaehoon Yu
2021 J jnl
Hidden-Fold Networks: Random Recurrent Residuals Using Sparse Supermasks.
CoRR
Ángel López García-Arias, Masanori Hashimoto, Masato Motomura, Jaehoon Yu
2021 A conf
MUX Granularity Oriented Iterative Technology Mapping for Implementing Compute-Intensive Applications on Via-Switch FPGA.
DATE
Takashi Imagawa, Jaehoon Yu, Masanori Hashimoto, Hiroyuki Ochi
2021 J jnl
ProgressiveNN: Achieving Computational Scalability with Dynamic Bit-Precision Adjustment by MSB-first Accumulative Computation.
Int. J. Netw. Comput.
Junnosuke Suzuki, Tomohiro Kaneko, Kota Ando, Kazutoshi Hirose, Kazushi Kawamura, Thiem Van Chu, Masato Motomura, Jaehoon Yu
2021 J jnl
Selective Fine-Tuning on a Classifier Ensemble: Realizing Adaptive Neural Networks With a Diversified Multi-Exit Architecture.
IEEE Access
Kazutoshi Hirose, Shinya Takamaeda-Yamazaki, Jaehoon Yu, Masato Motomura
2020 — conf
33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al Applications.
ISSCC
Masanori Hashimoto, Xu Bai, Naoki Banno, Munehiro Tada, Toshitsugu Sakamoto, Jaehoon Yu, Ryutaro Doi, Yusuke Araki, Hidetoshi Onodera, Takashi Imagawa, Hiroyuki Ochi, Kazutoshi Wakabayashi, Yukio Mitsuyama, Tadahiko Sugibayashi
2020 — conf
ExtraFerns: Fully Parallel Ensemble Learning Technique with Non-Greedy yet Minimal Memory Access Training.
CANDAR
Shungo Kumazawa, Kazushi Kawamura, Thiem Van Chu, Masato Motomura, Jaehoon Yu
2020 J jnl
Logarithm-approximate floating-point multiplier is applicable to power-efficient neural network training.
Integr.
Taiyu Cheng, Yukata Masuda, Jun Chen, Jaehoon Yu, Masanori Hashimoto
2020 C conf
Low-Cost Reservoir Computing using Cellular Automata and Random Forests.
ISCAS
Ángel López García-Arias, Jaehoon Yu, Masanori Hashimoto
2020 — conf
Memory Efficient Training using Lookup-Table-based Quantization for Neural Network.
AICAS
Kazuki Onishi, Jaehoon Yu, Masanori Hashimoto
2020 — conf
ProgressiveNN: Achieving Computational Scalability without Network Alteration by MSB-first Accumulative Computation.
CANDAR
Junnosuke Suzuki, Kota Ando, Kazutoshi Hirose, Kazushi Kawamura, Thiem Van Chu, Masato Motomura, Jaehoon Yu
2020 J jnl
Sneak Path Free Reconfiguration With Minimized Programming Steps for Via-Switch Crossbar-Based FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ryutaro Doi, Jaehoon Yu, Masanori Hashimoto
2019 — conf
Distilling Knowledge for Non-Neural Networks.
APSIPA
Shota Fukui, Jaehoon Yu, Masanori Hashimoto
2019 — conf
Minimizing Power for Neural Network Training with Logarithm-Approximate Floating-Point Multiplier.
PATMOS
Taiyu Cheng, Jaehoon Yu, Masanori Hashimoto
2019 J jnl
Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA.
IPSJ Trans. Syst. LSI Des. Methodol.
Salita Sombatsiri, Seiya Shibata, Yuki Kobayashi, Hiroaki Inoue, Takashi Takenaka, Takeo Hosomi, Jaehoon Yu, Yoshinori Takeuchi
2019 — conf
Training Data Reduction using Support Vectors for Neural Networks.
APSIPA
Toranosuke Tanio, Kouya Takeda, Jaehoon Yu, Masanori Hashimoto
2018 J jnl
Decomposed Vector Histograms of Oriented Gradients for Efficient Hardware Implementation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Koichi Mitsunari, Yoshinori Takeuchi, Masaharu Imai, Jaehoon Yu
2018 — conf
Hardware Architecture for Fast General Object Detection using Aggregated Channel Features.
A-SSCC
Koichi Mitsunari, Jaehoon Yu, Masanori Hashimoto
2018 J jnl
Hardware Architecture for High-Speed Object Detection Using Decision Tree Ensemble.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Koichi Mitsunari, Jaehoon Yu, Takao Onoye, Masanori Hashimoto
2018 — conf
Interconnect Delay Analysis for RRAM Crossbar Based FPGA.
ISVLSI
Masanori Hashimoto, Yuki Nakazawa, Ryutaro Doi, Jaehoon Yu
2018 J jnl
Phase Locking Value Calculator Based on Hardware-Oriented Mathematical Expression.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Tomoki Sugiura, Jaehoon Yu, Yoshinori Takeuchi
2018 A conf
Sneak path free reconfiguration of via-switch crossbars based FPGA.
ICCAD
Ryutaro Doi, Jaehoon Yu, Masanori Hashimoto
2018 J jnl
Via-Switch FPGA: Highly Dense Mixed-Grained Reconfigurable Architecture With Overlay Via-Switch Crossbars.
IEEE Trans. Very Large Scale Integr. Syst.
Hiroyuki Ochi, Kosei Yamaguchi, Tetsuaki Fujimoto, Junshi Hotate, Takashi Kishimoto, Toshiki Higashi, Takashi Imagawa, Ryutaro Doi, Munehiro Tada, Tadahiko Sugibayashi, Wataru Takahashi, Kazutoshi Wakabayashi, Hidetoshi Onodera, Yukio Mitsuyama, Jaehoon Yu, Masanori Hashimoto
2017 J jnl
A Low-Energy Application Specific Instruction-Set Processor towards a Low-Computational Lossless Compression Method for Stimuli Position Data of Artificial Vision Systems.
J. Inf. Process.
Tomoki Sugiura, Masaharu Imai, Jaehoon Yu, Yoshinori Takeuchi
2017 J jnl
Deformable Part Model Based Arrhythmia Detection Using Time Domain Features.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yuuka Hirao, Yoshinori Takeuchi, Masaharu Imai, Jaehoon Yu
2017 — conf
Hardware-oriented algorithm for phase synchronization analysis of biomedical signals.
BioCAS
Tomoki Sugiura, Jaehoon Yu, Yoshinori Takeuchi
2016 — conf
A programmable controller for spatio-temporal pattern stimulation of cortical visual prosthesis.
BioCAS
Tomoki Sugiura, Arif Ullah Khan, Jaehoon Yu, Yoshinori Takeuchi, Seiji Kameda, Takatsugu Kamata, Yuki Hayashida, Tetsuya Yagi, Masaharu Imai
2015 — conf
A low-energy ASIP with flexible exponential Golomb codec for lossless data compression toward artificial vision systems.
BioCAS
Tomoki Sugiura, Jaehoon Yu, Yoshinori Takeuchi, Masaharu Imai
2015 — conf
Design of generic hardware for soft cascade-based linear SVM classification.
ISPACS
Eric Aliwarga, Jaehoon Yu, Masahide Hatanaka, Takao Onoye
2014 — conf
An efficient data compression method for artificial vision systems and its low energy implementation using ASIP technology.
BioCAS
Tomoki Sugiura, Shoko Nakatsuka, Jaehoon Yu, Yoshinori Takeuchi, Masaharu Imai
2014 J jnl
Corrections to "A Speed-Up Scheme Based on Multiple-Instance Pruning for Pedestrian Detection Using a Support Vector Machine".
IEEE Trans. Image Process.
Jaehoon Yu, Ryusuke Miyamoto, Takao Onoye
2014 — conf
Normalized channel features for accurate pedestrian detection.
ISCCSP
Ryusuke Miyamoto, Jaehoon Yu, Takao Onoye
2013 J jnl
A Speed-Up Scheme Based on Multiple-Instance Pruning for Pedestrian Detection Using a Support Vector Machine.
IEEE Trans. Image Process.
Jaehoon Yu, Ryusuke Miyamoto, Takao Onoye
2007 — conf
Implementation of AV Streaming System Using Peer-to-Peer Communication.
CCNC
Norihiro Ishikawa, Hiroshi Tsutsui, Jaehoon Yu, Tomonori Izumi, Hiroyuki Ochi, Yukihiro Nakamura, Takaaki Komura, Yoshitaka Uchida
2005 J jnl
Performance of an Operating High Energy Physics Data Grid: DØSAR-Grid
CoRR
B. Abbott, P. Baringer, T. Bolton, Zeno Greenwood, E. Gregores, H. Kim, Chokchai Leangsuksun, D. Meyer, N. Mondal, S. Novaes, B. Quinn, Horst Severini, P. Skubic, J. Snow, Mark Sosebee, Jaehoon Yu