Jaeha Kim - RankMe

106 papers A* 11A 6B 1C 2Journal 51Unranked 35

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Weighted Coding Scheme for Noise Reduction in Silicon Interposer of HBM. IEEE Trans. Very Large Scale Integr. Syst. Sangouk Jeon, Seoyoon Jang, Kwanghyun Shin, DongKwon Lee, Hankyu Chi, Wookjin Shin, Changhyun Pyo, Jaeha Kim, Dongsuk Jeon
2025	J	`jnl`	An On-Chip Circuit With Digital Output for Characterizing Transistor Current Mismatch Across Multiple Bias Conditions. IEEE Access Donghun Chung, Hyungyu Shim, Seungho Yu, Jaeha Kim
2025	J	`jnl`	Exploiting Diffusion Prior for Task-driven Image Restoration. CoRR Jaeha Kim, Junghun Oh, Kyoung Mu Lee
2025	J	`jnl`	Implementing FFE-MLSD With Improved BER and Reduced Complexity for Long-Reach PAM4 Wireline Receivers. IEEE Access Hanseok Kim, Sihyun Lee, Piljun Jeong, Jaeha Kim, Woo-Seok Choi
2025	—	`conf`	Invited paper: Modeling and Simulation of Silicon Photonics Systems in SystemVerilog/XMODEL. ASP-DAC Jaeha Kim
2025	—	`conf`	WITCH: WeIghTed Coding Scheme for Crosstalk Reduction in High Bandwidth Memory. ASP-DAC Seoyoon Jang, Sangouk Jeon, Kwanghyun Shin, DongKwon Lee, Hankyu Chi, Wookjin Shin, Changhyun Pyo, Jaeha Kim, Dongsuk Jeon
2024	A*	`conf`	Beyond Image Super-Resolution for Image Recognition with Task-Driven Perceptual Loss. CVPR Jaeha Kim, Junghun Oh, Kyoung Mu Lee
2024	J	`jnl`	Beyond Image Super-Resolution for Image Recognition with Task-Driven Perceptual Loss. CoRR Jaeha Kim, Junghun Oh, Kyoung Mu Lee
2024	J	`jnl`	Fractionally-Spaced Equalizers as Clock and Data Recovery Loops. IEEE Trans. Circuits Syst. I Regul. Pap. Sigang Ryu, Jaeha Kim, Arijit Raychowdhury
2023	J	`jnl`	Accurate Layout-Dependent Effect Model in 10 nm-Class DRAM Process Using Area-Efficient Array Test Circuits. IEEE Access Seyoung Kim, Seungho Yang, Hyein Lim, Hyein Lee, Jongwook Jeon, Jung Yun Choi, Jaeha Kim
2023	J	`jnl`	Reachability Analysis for Nonlinear Analog/Mixed-Signal Circuits With Trajectory-Based Reachable Sets. IEEE Access Seyoung Kim, Jaeha Kim
2023	A*	`conf`	Recovering 3D Hand Mesh Sequence from a Single Blurry Image: A New Dataset and Temporal Unfolding. CVPR Yeonguk Oh, Joonkyu Park, Jaeha Kim, Gyeongsik Moon, Kyoung Mu Lee
2023	J	`jnl`	Recovering 3D Hand Mesh Sequence from a Single Blurry Image: A New Dataset and Temporal Unfolding. CoRR Yeonguk Oh, Joonkyu Park, Jaeha Kim, Gyeongsik Moon, Kyoung Mu Lee
2022	J	`jnl`	A 2.5-32 Gb/s Gen 5-PCIe Receiver With Multi-Rate CDR Engine and Hybrid DFE. IEEE Trans. Circuits Syst. II Express Briefs Moon-Chul Choi, Sanghee Lee, Seungha Roh, Kwangho Lee, Jonghyun Oh, Sungwoo Kim, Kwandong Kim, Woo-Seok Choi, Jaeha Kim, Deog-Kyoon Jeong
2022	—	`conf`	A Gradient-Descent Calibration Method to Mitigate Process Variations in Analog Synapse Arrays. ICEIC Seung-Heon Baek, Jaeha Kim
2022	J	`jnl`	Seemo: A new tool for early design window view satisfaction evaluation in residential buildings. CoRR Jaeha Kim, Michael Kent, Katharina Kral, Timur Dogan
2022	J	`jnl`	Toward Real-World Super-Resolution via Adaptive Downsampling Models. IEEE Trans. Pattern Anal. Mach. Intell. Sanghyun Son, Jaeha Kim, Wei-Sheng Lai, Ming-Hsuan Yang, Kyoung Mu Lee
2022	—	`conf`	XSNN: a System-Level Simulator for Spiking Neural Network with Neuron Circuits and Synapse Devices. ISOCC Jeong Woo Min, Jaeha Kim
2021	J	`jnl`	A Time-Based Pipelined ADC Using Integrate-and-Fire Multiplying-DAC. IEEE Trans. Circuits Syst. I Regul. Pap. Sigang Ryu, Chan Young Park, Wooryeol Kim, Seuk Son, Jaeha Kim
2021	—	`conf`	Fast Automatic Circuit Optimization Using Deep Learning. ISOCC Jiwoo Hong, Sunghoon Kim, Jaeha Kim, Dongsuk Jeon
2021	—	`conf`	Safety Verification of AMS Circuits with Piecewise-Linear System Reachability Analysis. ISOCC Seyoung Kim, Heechun Park, Jaeha Kim
2021	J	`jnl`	Toward Real-World Super-Resolution via Adaptive Downsampling Models. CoRR Sanghyun Son, Jaeha Kim, Wei-Sheng Lai, Ming-Hsuan Yang, Kyoung Mu Lee
2020	A	`conf`	Modeling and Simulation of NAND Flash Memory Sensing Systems with Cell-to-Cell Vth Variations. ICCAD Nayoung Choi, Jaeha Kim
2019	J	`jnl`	A 2 × Blind Oversampling FSE Receiver With Combined Adaptive Equalization and Infinite-Range Timing Recovery. IEEE J. Solid State Circuits Seuk Son, Sigang Ryu, Hwanseok Yeo, Jaeha Kim
2019	J	`jnl`	A channel-emulating high-speed transmitter with pseudo-logarithmic and low-bandwidth amplifiers. IEICE Electron. Express Kyunghoon Kim, Jaeha Kim
2019	J	`jnl`	An Accurate and Noise-Resilient Spread-Spectrum Clock Tracking Aid for Digitally-Controlled Clock and Data Recovery Loops. IEEE Trans. Circuits Syst. I Regul. Pap. Sigang Ryu, Seuk Son, Jaeha Kim
2018	—	`conf`	A 2× Blind Oversampling FSE Receiver with Combined Adaptive Equalization and Infinite-Range Timing Recovery. A-SSCC Seuk Son, Hwanseok Yeo, Sigang Ryu, Jaeha Kim
2018	J	`jnl`	CHIMERA: A Field-Programmable Mixed-Signal IC With Time-Domain Configurable Analog Blocks. IEEE J. Solid State Circuits Yunju Choi, Yoontaek Lee, Seung-Heon Baek, Sung-Joon Lee, Jaeha Kim
2018	J	`jnl`	Design and Analysis of Energy-Efficient Single-Pulse Piezoelectric Energy Harvester and Power Management IC for Battery-Free Wireless Remote Switch Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Minbok Lee, Joonseok Yang, Myeong-Jae Park, Sung-Youb Jung, Jaeha Kim
2018	—	`conf`	EE6: Can artificial intelligence replace my job? The dawn of a new IC industry with AI. ISSCC Jaeha Kim, Ki-Tae Park
2018	J	`jnl`	Electronic skins for soft, compact, reversible assembly of wirelessly activated fully soft robots. Sci. Robotics Yoontaek Lee, Jaeyoung Yoon, Byeongmoon Lee, Eunho Oh, Seungjun Chung, Takhee Lee, Kyu-Jin Cho, Jaeha Kim, Yongtaek Hong
2017	—	`conf`	Adaptive vibrotactile flow rendering of 2.5D surface features on touch screen with multiple fingertip interfaces. WHC Jaeha Kim, Yonghwan Oh, Jaeyoung Park
2017	—	`conf`	Compensation of perceived hardness of a virtual object with cutaneous feedback. WHC Jaeyoung Park, Jaeha Kim, Yonghwan Oh, Hong Z. Tan
2017	J	`jnl`	Introduction to the Special Section on the 2016 Asian Solid-State Circuits Conference (A-SSCC 2016). IEEE J. Solid State Circuits Deog-Kyoon Jeong, Jaeha Kim
2016	—	`conf`	13.1 A 940MHz-bandwidth 28.8µs-period 8.9GHz chirp frequency synthesizer PLL in 65nm CMOS for X-band FMCW radar applications. ISSCC Hwanseok Yeo, Sigang Ryu, Yoontaek Lee, Seuk Son, Jaeha Kim
2016	—	`conf`	A field-programmable mixed-signal IC with time-domain configurable analog blocks. VLSI Circuits Yunju Choi, Yoontaek Lee, Seung-Heon Baek, Sung-Joon Lee, Jaeha Kim
2016	J	`jnl`	Efficient Global Optimization of Analog Circuits Using Predictive Response Surface Models on Discretized Design Space. IEEE Des. Test Jiho Lee, Jaeha Kim
2016	—	`conf`	Rendering Moving Tactile Stroke on the Palm Using a Sparse 2D Array. EuroHaptics (1) Jaeyoung Park, Jaeha Kim, Yonghwan Oh, Hong Z. Tan
2016	—	`conf`	Session 10 overview: Advanced wireline transceivers and PLLs. ISSCC Jaeha Kim, Roberto Nonis
2016	—	`conf`	Time slot optimization algorithm for multisource energy harvesting systems. ESSCIRC Sung-Youb Jung, Myeong-Jae Park, Minbok Lee, Joonseok Yang, Jaeha Kim
2015	—	`conf`	A 2.5-V, 160-μJ-output piezoelectric energy harvester and power management IC for batteryless wireless switch (BWS) applications. VLSIC Joonseok Yang, Minbok Lee, Myeong-Jae Park, Sung-Youb Jung, Jaeha Kim
2015	J	`jnl`	Depth Cube-Based Six Degree-of-Freedom Haptic Rendering for Rigid Bodies. IEEE Trans. Haptics Jaeha Kim, Chang-Gyu Lee, Jeha Ryu
2015	J	`jnl`	Digital Analog Design: Enabling Mixed-Signal System Validation. IEEE Des. Test ByongChan Lim, Ji-Eun Jang, James Mao, Jaeha Kim, Mark Horowitz
2015	J	`jnl`	Jussi Ryynänen Introduction to the December Special Issue on the 2015 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits Makoto Takamiya, Jieh-Tsorng Wu, Jussi Ryynänen, Kenichi Okada, Jaeha Kim
2015	J	`jnl`	PPV-Based Modeling and Event-Driven Simulation of Injection-Locked Oscillators in SystemVerilog. IEEE Trans. Circuits Syst. I Regul. Pap. Ji-Eun Jang, Jaeha Kim
2015	—	`conf`	The contact/non-contact thimble haptic device. ICM WooHyeok Choi, Sung-moon Hur, Jaeha Kim, Yonghwan Oh
2014	J	`jnl`	A 9.2 GHz Digital Phase-Locked Loop With Peaking-Free Transfer Function. IEEE J. Solid State Circuits Sigang Ryu, Hwanseok Yeo, Yoontaek Lee, Seuk Son, Jaeha Kim
2014	A	`conf`	A built-in self-test circuit for jitter tolerance measurement in high-speed wireline receivers. ITC Myeong-Jae Park, Jaeha Kim
2014	—	`conf`	Advanced modeling and simulation of state-of-the-art high-speed I/O interfaces. CICC Jaeha Kim
2014	J	`jnl`	Linearization Technique for Binary Phase Detectors in a Collaborative Timing Recovery Circuit. IEEE Trans. Very Large Scale Integr. Syst. Byoung-Joo Yoo, Woo-Rham Bae, Jiho Han, Jaeha Kim, Deog-Kyoon Jeong
2014	—	`conf`	PPV-based modeling and event-driven simulation of injection-locked oscillators in SystemVerilog. CICC Jaeha Kim, Si-Jung Yang, Ji-Eun Jang
2014	A*	`conf`	Probabilistic Bug Localization via Statistical Inference based on Partially Observed Data. DAC Sangho Youn, Chenjie Gu, Jaeha Kim
2014	J	`jnl`	Variability-Aware, Discrete Optimization for Analog Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Seobin Jung, Jiho Lee, Jaeha Kim
2014	J	`jnl`	Yield-Aware Pareto Front Extraction for Discrete Hierarchical Optimization of Analog Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Seobin Jung, Jiho Lee, Jaeha Kim
2013	J	`jnl`	A 2.3-mW, 5-Gb/s Low-Power Decision-Feedback Equalizer Receiver Front-End and its Two-Step, Minimum Bit-Error-Rate Adaptation Algorithm. IEEE J. Solid State Circuits Seuk Son, Hanseok Kim, Myeong-Jae Park, Kyung-Hoon Kim, E-Hung Chen, Brian S. Leibowitz, Jaeha Kim
2013	—	`conf`	A 9.2-GHz digital phase-locked loop with peaking-free transfer function. CICC Sigang Ryu, Hwanseok Yeo, Yoontaek Lee, Seuk Son, Jaeha Kim
2013	—	`conf`	A low-power high-radix switch fabric based on low-swing signaling and partially-activated input lines. VLSI-DAT Do-Gyoon Song, Jaeha Kim
2013	A*	`conf`	An event-driven simulation methodology for integrated switching power supplies in SystemVerilog. DAC Ji-Eun Jang, Myeong-Jae Park, Jaeha Kim
2013	J	`jnl`	Construction of a haptic-enabled broadcasting system based on the MPEG-V standard. Signal Process. Image Commun. Jaeha Kim, Chang-Gyu Lee, Yeongmi Kim, Jeha Ryu
2013	—	`conf`	Discretization and discrimination methods for design, verification, and testing of analog/mixed-signal circuits. CICC Jaeha Kim, Jiho Lee, Do-Gyoon Song, Taehwan Kim, Kyung-Hoon Kim, Seobin Jung, Sangho Youn
2013	—	`conf`	Event-driven simulation of Volterra series models in SystemVerilog. CICC Ji-Eun Jang, Si-Jung Yang, Jaeha Kim
2013	—	`conf`	MPEG-V standardization for haptically interacting with virtual worlds. World Haptics Jaeha Kim, Yeongmi Kim, Jeha Ryu
2013	B	`conf`	Memory-centric system interconnect design with Hybrid Memory Cubes. PACT Gwangsun Kim, John Kim, Jung Ho Ahn, Jaeha Kim
2013	J	`jnl`	Preventing Global Convergence Failure in Mixed-Signal Systems via Indeterminate State ('X') Elimination. IEEE Trans. Circuits Syst. I Regul. Pap. Sangho Youn, Jaeha Kim
2013	J	`jnl`	Pseudo-Linear Analysis of Bang-Bang Controlled Timing Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Myeong-Jae Park, Jaeha Kim
2013	C	`conf`	Robust random chip ID generation with wide-aperture clocked comparators and maximum likelihood detection. ISCAS Yunju Choi, Jaeha Kim
2013	A	`conf`	Verifying start-up failures in coupled ring oscillators in presence of variability using predictive global optimization. ICCAD Taehwan Kim, Do-Gyoon Song, Sangho Youn, Jaejin Park, Hojin Park, Jaeha Kim
2013	—	`conf`	Wireline transmitter and receiver design techniques. CICC Dennis Michael Fischette, Jaeha Kim
2012	—	`conf`	A 5-Gbps 1.7 pJ/bit ditherless CDR with optimal phase interval detection. CICC Myeong-Jae Park, Hanseok Kim, Seuk Son, Jaeha Kim
2012	C	`conf`	A model-first design and verification flow for analog-digital convergence systems: A high-speed receiver example in digital TVs. ISCAS Jaeha Kim, Sigang Ryu, Byoung-Joo Yoo, Hanseok Kim, Yunju Choi, Deog-Kyoon Jeong
2012	—	`conf`	Design of low-power high-radix switch fabric with partially-activated input and output lines. ISOCC Jihyun Ryoo, Seuk Son, Jaeha Kim
2012	—	`conf`	True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example. CICC Ji-Eun Jang, Myeong-Jae Park, Dongyun Lee, Jaeha Kim
2012	A*	`conf`	Variability-aware, discrete optimization for analog circuits. DAC Seobin Jung, Yunju Choi, Jaeha Kim
2011	J	`jnl`	Equalizer Design and Performance Trade-Offs in ADC-Based Serial Links. IEEE Trans. Circuits Syst. I Regul. Pap. Jaeha Kim, E-Hung Chen, Jihong Ren, Brian S. Leibowitz, Patrick Satarzadeh, Jared Zerbe, Chih-Kong Ken Yang
2011	—	`conf`	Fast and accurate event-driven simulation of mixed-signal systems with data supplementation. CICC Myeong-Jae Park, Hanseok Kim, Minbok Lee, Jaeha Kim
2011	A*	`conf`	Global convergence analysis of mixed-signal systems. DAC Sangho Youn, Jaeha Kim, Mark Horowitz
2010	A*	`conf`	An efficient test vector generation for checking analog/mixed-signal functional models. DAC ByongChan Lim, Jaeha Kim, Mark A. Horowitz
2010	—	`conf`	Enhancing rate-hardness of energy-bounding algorithm by considering Coulomb friction of haptic interface. HAPTICS Jaeha Kim, Changhoon Seo, Jeha Ryu, Jong-Phil Kim
2010	—	`conf`	Equalizer design and performance trade-offs in ADC-based serial links. CICC Jaeha Kim, Jihong Ren, Brian S. Leibowitz, Patrick Satarzadeh, Ali-Azam Abbasfar, Jared Zerbe
2010	J	`jnl`	Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch. IEEE Trans. Circuits Syst. I Regul. Pap. Jaeha Kim, Kevin D. Jones, Mark A. Horowitz
2010	A	`conf`	Intent-leveraged optimization of analog circuits via homotopy. DATE Metha Jeeradit, Jaeha Kim, Mark Horowitz
2009	J	`jnl`	A Fully Integrated 0.13-µm CMOS 40-Gb/s Serial Link Transceiver. IEEE J. Solid State Circuits Jeong-Kyoum Kim, Jaeha Kim, Gyudong Kim, Deog-Kyoon Jeong
2009	J	`jnl`	Accurate and Efficient CPU/GPU-Based 3-DOF Haptic Rendering of Complex Static Virtual Environments. Presence Teleoperators Virtual Environ. Jong-Phil Kim, Beom-Chan Lee, Hyungon Kim, Jaeha Kim, Jeha Ryu
2009	J	`jnl`	Adaptive-Bandwidth Phase-Locked Loop With Continuous Background Frequency Calibration. IEEE Trans. Circuits Syst. II Express Briefs Jaeha Kim
2009	—	`conf`	An energy bounding approach for directional transparency in multiple degree-of-freedom haptic interaction. WHC Jaeha Kim, Jong-Phil Kim, Changhoon Seo, Jeha Ryu
2009	J	`jnl`	Design Optimization of On-Chip Inductive Peaking Structures for 0.13-μm CMOS 40-Gb/s Transmitter Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Jaeha Kim, Jeong-Kyoum Kim, Bong-Joon Lee, Deog-Kyoon Jeong
2009	—	`conf`	Energy-bounding algorithm for stable haptic interaction and bilateral teleoperation. WHC Changhoon Seo, Jong-Phil Kim, Jaeha Kim, Jeha Ryu
2009	—	`conf`	Leveraging designer's intent: A path toward simpler analog CAD tools. CICC Jaeha Kim, Metha Jeeradit, ByongChan Lim, Mark A. Horowitz
2009	A*	`conf`	Mixed-Signal System Verification: A High-Speed Link Example. CAV Jaeha Kim
2009	J	`jnl`	On-Chip Measurement of Jitter Transfer and Supply Sensitivity of PLL/DLLs. IEEE Trans. Circuits Syst. II Express Briefs Jaeha Kim
2009	J	`jnl`	Simulation and Analysis of Random Decision Errors in Clocked Comparators. IEEE Trans. Circuits Syst. I Regul. Pap. Jaeha Kim, Brian S. Leibowitz, Jihong Ren, Chris J. Madden
2009	A*	`conf`	Stochastic steady-state and AC analyses of mixed-signal systems. DAC Jaeha Kim, Jihong Ren, Mark A. Horowitz
2008	—	`conf`	Characterization of random decision errors in clocked comparators. CICC Brian S. Leibowitz, Jaeha Kim, Jihong Ren, Chris J. Madden
2008	A	`conf`	Impulse sensitivity function analysis of periodic circuits. ICCAD Jaeha Kim, Brian S. Leibowitz, Metha Jeeradit
2007	J	`jnl`	A Single-Pair Serial Link for Mobile Displays With Clock Edge Modulation Scheme. IEEE J. Solid State Circuits Won-Jun Choe, Bong-Joon Lee, Jaeha Kim, Deog-Kyoon Jeong, Gyudong Kim
2007	A*	`conf`	Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch. DAC Jaeha Kim, Kevin D. Jones, Mark A. Horowitz
2007	A	`conf`	Variable domain transformation for linear PAC analysis of mixed-signal systems. ICCAD Jaeha Kim, Kevin D. Jones, Mark A. Horowitz
2006	J	`jnl`	A 20-GHz phase-locked loop for 40-gb/s serializing transmitter in 0.13-μm CMOS. IEEE J. Solid State Circuits Jaeha Kim, Jeong-Kyoum Kim, Bong-Joon Lee, Namhoon Kim, Deog-Kyoon Jeong, Wonchan Kim
2006	J	`jnl`	Replica compensated linear regulators for supply-regulated phase-locked loops. IEEE J. Solid State Circuits Elad Alon, Jaeha Kim, Sudhakar Pamarti, Ken Chang, Mark Horowitz
2005	J	`jnl`	A 1.2-V-only 900-mW 10 gb ethernet transceiver and XAUI interface with robust VCO tuning technique. IEEE J. Solid State Circuits Hyung-Rok Lee, Moon-Sang Hwang, Bong-Joon Lee, Young-Deok Kim, Dohwan Oh, Jaeha Kim, Sang-Hyun Lee, Deog-Kyoon Jeong, Wonchan Kim
2003	J	`jnl`	Design of CMOS adaptive-bandwidth PLL/DLLs: a general approach. IEEE Trans. Circuits Syst. II Express Briefs Jaeha Kim, Mark A. Horowitz, Gu-Yeon Wei
2003	J	`jnl`	Multi-gigabit-rate clock and data recovery based on blind oversampling. IEEE Commun. Mag. Jaeha Kim, Deog-Kyoon Jeong
2003	A*	`conf`	Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL. DAC John G. Maneatis, Jaeha Kim, Iain McClatchie, Jay Maxey, Manjusha Shankaradas
2003	J	`jnl`	Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL. IEEE J. Solid State Circuits John G. Maneatis, Jaeha Kim, Iain McClatchie, Jay Maxey, Manjusha Shankaradas
2002	J	`jnl`	An efficient digital sliding controller for adaptive power-supply regulation. IEEE J. Solid State Circuits Jaeha Kim, Mark A. Horowitz
2000	J	`jnl`	A variable-frequency parallel I/O interface with adaptive power-supply regulation. IEEE J. Solid State Circuits Gu-Yeon Wei, Jaeha Kim, Dean Liu, Stefanos Sidiropoulos, Mark A. Horowitz