Jae-Kyung Wee - RankMe

16 papers C 2Misc 1Journal 10Unranked 3

Year	Rank	Type	Title / Venue / Authors
2013	J	`jnl`	A Digitally-Controlled SMPS Using a Novel High-Resolution DPWM Generator Based on a Pseudo Relaxation-Oscillation Technique. IEICE Trans. Electron. Ji-Hoon Lim, Won-Young Jung, Yong-Ju Kim, Inchae Song, Jae-Kyung Wee
2012	C	`conf`	Current readout circuit using two-stage amplification method for 64-channel CNT arrays. ISCAS Young San Shin, Seongsoo Lee, Jae-Kyung Wee
2012	—	`conf`	One-chip multi-output SMPS using a shared digital controller and a pseudo relaxation oscillating technique. ISOCC Young-Kyun Park, Ji-Hoon Lim, Jae-Kyung Wee, Inchae Song
2011	J	`jnl`	A Seamless-Controlled Digital PLL Using Dual Loops for High Speed SoCs. J. Circuits Syst. Comput. Young San Shin, Jae-Kyung Wee, Jong-Chan Ha, Ji-Hoon Lim, Yong-Ju Kim, Young-Sang Son
2008	J	`jnl`	Novel Method of Interconnect Worstcase Establishment with Statistically-Based Approaches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Won-Young Jung, Hyungon Kim, Yong-Ju Kim, Jae-Kyung Wee
2007	J	`jnl`	A Novel High-Speed and Low-Voltage CMOS Level-Up/Down Shifter Design for Multiple-Power and Multiple-Clock Domain Chips. IEICE Trans. Electron. Ji-Hoon Lim, Jong-Chan Ha, Won-Young Jung, Yong-Ju Kim, Jae-Kyung Wee
2006	J	`jnl`	Fast and Accurate Power Bus Designer for Multi-Layers High-Speed Digital Boards. IEICE Trans. Electron. Yong-Ju Kim, Won-Young Jung, Jae-Kyung Wee
2005	J	`jnl`	Low-Hardware-Cost Motion Estimation with Large Search Range for VLSI Multimedia Processors. IEICE Trans. Inf. Syst. Seongsoo Lee, Min-Cheol Hong, Jae-Kyung Wee
2005	Misc	`conf`	Low-Power 32bit×32bit Multiplier Design with Pipelined Block-Wise Shutdown. HiPC Yong-Ju Jang, Yoan Shin, Min-Cheol Hong, Jae-Kyung Wee, Seongsoo Lee
2005	—	`conf`	Low-Power MPEG-4 Motion Estimator Design for Deep Sub-Micron Multimedia SoC. KES (3) Gyu-Sung Yeon, Chi-Hun Jun, Tae-Jin Hwang, Seongsoo Lee, Jae-Kyung Wee
2005	C	`conf`	Pipelined Bidirectional Bus Architecture for Embedded Multimedia SoCs. EUC Gang-Hoon Seo, Won-Yong Jung, Seongsoo Lee, Jae-Kyung Wee
2004	—	`conf`	Low power motion estimator architecture with leakage power reduction in deep sub-micron SoC. Circuits, Signals, and Systems Gyu-Sung Yeon, Chi-Hun Jun, Tae-Jin Hwang, Seongsoo Lee, Jae-Kyung Wee
2002	J	`jnl`	A low-jitter wide-range skew-calibrated dual-loop DLL using antifuse circuitry for high-speed DRAM. IEEE J. Solid State Circuits Se Jun Kim, Sang Hoon Hong, Jae-Kyung Wee, Joo-Hwan Cho, Pil Soo Lee, Jin-Hong Ahn, Jin-Yong Chung
2002	J	`jnl`	A post-package bit-repair scheme using static latches with bipolar-voltage programmable antifuse circuit for high-density DRAMs. IEEE J. Solid State Circuits Jae-Kyung Wee, Kyeong-Sik Min, Jong-Tai Park, Sang-Pil Lee, Young-Hee Kim, Tae-Heum Yang, Jong-Doo Joo, Jin-Yong Chung
2002	J	`jnl`	Low-voltage DRAM sensing scheme with offset-cancellation sense amplifier. IEEE J. Solid State Circuits Sanghoon Hong, Sejun Kim, Jae-Kyung Wee, Seongsoo Lee
2000	J	`jnl`	An antifuse EPROM circuitry scheme for field-programmable repair in DRAM. IEEE J. Solid State Circuits Jae-Kyung Wee, Woodward Yang, Eui-Kyu Ryou, Joe-Sun Choi, Seung-Han Ahn, Jin-Yong Chung, Sea-Chung Kim