Jae-Gon Lee

17 papers A 1Journal 8Unranked 8
YearRankTypeTitle / Venue / Authors
2023 J jnl
Fully Automated Hardware-Driven Clock-Gating Architecture With Complete Clock Coverage for 4 nm Exynos Mobile SOC.
IEEE J. Solid State Circuits
Jae-Gon Lee, Younsik Choi, Hoyeon Jeon, Jong-Jin Lee, Dongsuk Shin
2022 — conf
Automatic Waveguide Balancing Using Point Set Operations.
OFC
Won Suk Lee, Yusheng Bian, Thomas Weeks, Michal Rakowski, Francis O. Afzal, Takako Hirokawa, Asif Chowdhury, Rod Augur, Jae-Gon Lee, Alexander Martin, Ken Giewont
2022 J jnl
Design of EM Sensor for Non-Contact Detection of Defective Wire Harness in Conveyor System.
Sensors
Hailin Zeng, Jeong-Hyun Park, Mincheol Kim, Jae-Gon Lee
2022 — conf
Fully Automated Hardware-Driven Clock-Gating Architecture with Complete Clock Coverage for 5nm Exynos Mobile SoC.
ISSCC
Jae-Gon Lee, Hoyeon Jeon, Younsik Choi, Ahchan Kim
2021 J jnl
Low-profile high efficiency transmitarray antenna using optimized phase compensation surface (PCS) and PEC sidewalls.
ICT Express
Jeong-Hyun Park, Jae-Gon Lee
2019 — conf
An 11.5TOPS/W 1024-MAC Butterfly Structure Dual-Core Sparsity-Aware Neural Processing Unit in 8nm Flagship Mobile SoC.
ISSCC
Jinook Song, Yunkyo Cho, Jun-Seok Park, Jun-Woo Jang, Sehwan Lee, Joon-Ho Song, Jae-Gon Lee, Inyup Kang
2018 J jnl
Compact Controlled Reception Pattern Antenna (CRPA) Array Based on Mu-Zero Resonance (MZR) Antenna.
IEICE Trans. Commun.
Jae-Gon Lee, Taek-Sun Kwon, Bo-Hee Choi, Jeong-Hae Lee
2018 J jnl
Effects of Finite Superstrate and Asymmetrical Ground on High Gain Superstrate Antenna.
IEICE Trans. Commun.
Jae-Gon Lee, Taek-Sun Kwon, Jeong-Hae Lee
2018 J jnl
Multiband Antenna Based on Meta-Structured Transmission Line for RF Harvesting Application.
IEICE Trans. Commun.
Kwi Seob Um, Jae-Gon Lee, Jeong-Hae Lee
2014 — conf
OCV-aware top-level clock tree optimization.
ACM Great Lakes Symposium on VLSI
Tuck-Boon Chan, Kwangsoo Han, Andrew B. Kahng, Jae-Gon Lee, Siddhartha Nath
2007 J jnl
A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation
CoRR
Jae-Gon Lee, Moo-Kyoung Chung, Ki-Yong Ahn, Sang-Heon Lee, Chong-Min Kyung
2006 J jnl
PrePack: Predictive Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jae-Gon Lee, Chong-Min Kyung
2005 A conf
A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.
DATE
Jae-Gon Lee, Moo-Kyoung Chung, Ki-Yong Ahn, Sang-Heon Lee, Chong-Min Kyung
2005 — conf
Predictive Synchronization Scheme between Simulator And Accelerator Free from Performance Deterioration.
SoC
Jae-Gon Lee, Ki-Yong Ahn, Chong-Min Kyung
2005 — conf
Simulation acceleration of transaction-level models for SoC with RTL sub-blocks.
ASP-DAC
Jae-Gon Lee, Woo-Seung Yang, Young-Su Kwon, Young-Il Kim, Chong-Min Kyung
2004 — conf
Bandwidth tracing arbitration algorithm for mixed-clock SoC with dynamic priority adaptation.
ASP-DAC
Young-Su Kwon, Jae-Gon Lee, Chong-Min Kyung
2004 — conf
SmartGlue: an interface controller with auto reconfiguration for field programmable computing machine.
ASP-DAC
Young-Il Kim, Bong-Il Park, Jae-Gon Lee, Chong-Min Kyung