Jacques-Olivier Klein

94 papers A 5B 4C 8Journal 41Unranked 35

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	Improving Normalizing Flows with the Approximate Mass for Out-of-Distribution Detection. CVPR Workshops Samy Chali, Inna Kucher, Marc Duranton, Jacques-Olivier Klein
2021	J	`jnl`	Implementation of Ternary Weights With Resistive RAM Using a Single Sense Operation Per Synapse. IEEE Trans. Circuits Syst. I Regul. Pap. Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2021	J	`jnl`	Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks. CoRR Atreya Majumdar, Marc Bocquet, Tifenn Hirtzlin, Axel Laborieux, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2020	—	`conf`	Embracing the Unreliability of Memory Devices for Neuromorphic Computing. IRPS Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2020	J	`jnl`	Embracing the Unreliability of Memory Devices for Neuromorphic Computing. CoRR Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2020	J	`jnl`	Implementation of Ternary Weights with Resistive RAM Using a Single Sense Operation per Synapse. CoRR Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2020	A	`conf`	In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. DATE Bogdan Penkovsky, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2020	J	`jnl`	In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. CoRR Bogdan Penkovsky, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2020	—	`conf`	Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. AICAS Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Liza Herrera Diez, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2020	J	`jnl`	Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. CoRR Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Liza Herrera Diez, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2019	J	`jnl`	A comprehensive compact model for the design of all-spin-logic based circuits. Microelectron. J. Qi An, Sébastien Le Beux, Ian O'Connor, Jacques-Olivier Klein
2019	J	`jnl`	Contrasting Advantages of Learning With Random Weights and Backpropagation in Non-Volatile Memory Neural Networks. IEEE Access Christopher H. Bennett, Vivek Parmar, Laurie E. Calvet, Jacques-Olivier Klein, Manan Suri, Matthew J. Marinella, Damien Querlioz
2019	J	`jnl`	Digital Biologically Plausible Implementation of Binarized Neural Networks with Differential Hafnium Oxide Resistive Memory Arrays. CoRR Tifenn Hirtzlin, Marc Bocquet, Bogdan Penkovsky, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2019	—	`conf`	Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction. NANOARCH Tifenn Hirtzlin, Bogdan Penkovsky, Jacques-Olivier Klein, Nicolas Locatelli, Adrien F. Vincent, Marc Bocquet, Jean-Michel Portal, Damien Querlioz
2019	J	`jnl`	Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction. CoRR Tifenn Hirtzlin, Bogdan Penkovsky, Jacques-Olivier Klein, Nicolas Locatelli, Adrien F. Vincent, Marc Bocquet, Jean-Michel Portal, Damien Querlioz
2019	J	`jnl`	In-Memory and Error-Immune Differential RRAM Implementation of Binarized Deep Neural Networks. CoRR Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2019	—	`conf`	Memory-Centric Neuromorphic Computing With Nanodevices. BioCAS Damien Querlioz, Julie Grollier, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Marc Bocquet, Jean-Michel Portal, Miguel Romera, Philippe Talatchian
2019	—	`conf`	Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. AICAS Tifenn Hirtzlin, Marc Bocquet, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2019	J	`jnl`	Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. CoRR Tifenn Hirtzlin, Marc Bocquet, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
2019	J	`jnl`	Stochastic Computing for Hardware Implementation of Binarized Neural Networks. IEEE Access Tifenn Hirtzlin, Bogdan Penkovsky, Marc Bocquet, Jacques-Olivier Klein, Jean-Michel Portal, Damien Querlioz
2019	J	`jnl`	Stochastic Computing for Hardware Implementation of Binarized Neural Networks. CoRR Tifenn Hirtzlin, Bogdan Penkovsky, Marc Bocquet, Jacques-Olivier Klein, Jean-Michel Portal, Damien Querlioz
2019	J	`jnl`	Ultra-Dense Ring-Shaped Racetrack Memory Cache Design. IEEE Trans. Circuits Syst. I Regul. Pap. Guanda Wang, Yue Zhang, Beibei Zhang, Bi Wu, Jiang Nan, Xueying Zhang, Zhizhong Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Zhaohao Wang, Youguang Zhang, Weisheng Zhao
2018	A	`conf`	Large scale, high density integration of all spin logic. DATE Qi An, Sébastien Le Beux, Ian O'Connor, Jacques-Olivier Klein
2018	J	`jnl`	Multiscaled Simulation Methodology for Neuro-Inspired Circuits Demonstrated with an Organic Memristor. IEEE Trans. Multi Scale Comput. Syst. Christopher H. Bennett, Jean-Etienne Lorival, François Marc, Theo Cabaret, Bruno Jousselme, Vincent Derycke, Jacques-Olivier Klein, Cristell Maneux
2017	—	`conf`	Arithmetic Logic Unit based on all-spin logic devices. NEWCAS Qi An, Sébastien Le Beux, Ian O'Connor, Jacques-Olivier Klein, Weisheng Zhao
2017	—	`conf`	Offset Analysis and Design Optimization of a Dynamic Sense Amplifier for Resistive Memories. ISVLSI Salmen Mraihi, El Mehdi Boujamaa, Cyrille Dray, Jacques-Olivier Klein
2017	J	`jnl`	Spatio-temporal Learning with Arrays of Analog Nanosynapses. CoRR Christopher H. Bennett, Damien Querlioz, Jacques-Olivier Klein
2017	—	`conf`	Spatio-temporal learning with arrays of analog nanosynapses. NANOARCH Christopher H. Bennett, Damien Querlioz, Jacques-Olivier Klein
2016	—	`conf`	A novel circuit design of true random number generator using magnetic tunnel junction. NANOARCH You Wang, Hao Cai, Lirida A. B. Naviner, Jacques-Olivier Klein, Jianlei Yang, Weisheng Zhao
2016	J	`jnl`	A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI. Microelectron. Reliab. You Wang, Hao Cai, Lirida A. B. Naviner, Xiaoxuan Zhao, Yue Zhang, Mariem Slimani, Jacques-Olivier Klein, Weisheng Zhao
2016	—	`conf`	A recurrent crossbar of memristive nanodevices implements online novelty detection. ICRC Christopher H. Bennett, Damien Querlioz, Jacques-Olivier Klein
2016	J	`jnl`	All Spin Artificial Neural Networks Based on Compound Spintronic Synapse and Neuron. IEEE Trans. Biomed. Circuits Syst. Deming Zhang, Lang Zeng, Kaihua Cao, Mengxing Wang, Shouzhong Peng, Yue Zhang, Youguang Zhang, Jacques-Olivier Klein, Yu Wang, Weisheng Zhao
2016	B	`conf`	Exploiting the short-term to long-term plasticity transition in memristive nanodevice learning architectures. IJCNN Christopher H. Bennett, Selina La Barbera, Adrien F. Vincent, Jacques-Olivier Klein, Fabien Alibart, Damien Querlioz
2016	J	`jnl`	Perspectives of Racetrack Memory for Large-Capacity On-Chip Memory: From Device to System. IEEE Trans. Circuits Syst. I Regul. Pap. Yue Zhang, Chao Zhang, Jiang Nan, Zhizhong Zhang, Xueying Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, Weisheng Zhao
2016	J	`jnl`	Read disturbance issue and design techniques for nanoscale STT-MRAM. J. Syst. Archit. Yi Ran, Wang Kang, Youguang Zhang, Jacques-Olivier Klein, Weisheng Zhao
2016	—	`conf`	Stochastic spintronic device based synapses and spiking neurons for neuromorphic computation. NANOARCH Deming Zhang, Lang Zeng, Youguang Zhang, Weisheng Zhao, Jacques-Olivier Klein
2015	—	`conf`	Channel Modeling and Reliability Enhancement Design Techniques for STT-MRAM. ISVLSI Liuyang Zhang, Wang Kang, Youguang Zhang, Yuanqing Cheng, Lang Zeng, Jacques-Olivier Klein, Weisheng Zhao
2015	J	`jnl`	Compact thermal modeling of spin transfer torque magnetic tunnel junction. Microelectron. Reliab. You Wang, Hao Cai, Lirida A. B. Naviner, Yue Zhang, Jacques-Olivier Klein, Weisheng Zhao
2015	A	`conf`	From device to system: cross-layer design exploration of racetrack memory. DATE Guangyu Sun, Chao Zhang, Hehe Li, Yue Zhang, Weiqi Zhang, Yizi Gu, Yinan Sun, Jacques-Olivier Klein, Dafine Ravelosona, Yongpan Liu, Weisheng Zhao, Huazhong Yang
2015	—	`conf`	Full-adder circuit design based on all-spin logic device. NANOARCH Qi An, Li Su, Jacques-Olivier Klein, Sébastien Le Beux, Ian O'Connor, Weisheng Zhao
2015	J	`jnl`	On-Chip Universal Supervised Learning Methods for Neuro-Inspired Block of Memristive Nanodevices. ACM J. Emerg. Technol. Comput. Syst. Djaafar Chabi, Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein
2015	C	`conf`	Perspectives of racetrack memory based on current-induced domain wall motion: From device to system. ISCAS Yue Zhang, Chao Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, Weisheng Zhao
2015	—	`conf`	Read disturbance issue for nanoscale STT-MRAM. NVMSA Yi Ran, Wang Kang, Youguang Zhang, Jacques-Olivier Klein, Weisheng Zhao
2015	—	`conf`	Robust magnetic full-adder with voltage sensing 2T/2MTJ cell. NANOARCH Erya Deng, You Wang, Zhaohao Wang, Jacques-Olivier Klein, Bernard Dieny, Guillaume Prenat, Weisheng Zhao
2015	J	`jnl`	Spin-Transfer Torque Magnetic Memory as a Stochastic Memristive Synapse for Neuromorphic Systems. IEEE Trans. Biomed. Circuits Syst. Adrien F. Vincent, Jerome Larroque, Nicolas Locatelli, Nesrine Ben Romdhane, Olivier Bichler, Christian Gamrat, Weisheng Zhao, Jacques-Olivier Klein, Sylvie Galdin-Retailleau, Damien Querlioz
2015	A	`conf`	Spintronic devices as key elements for energy-efficient neuroinspired architectures. DATE Nicolas Locatelli, Adrien F. Vincent, Alice Mizrahi, Joseph S. Friedman, Damir Vodenicarevic, Joo-Von Kim, Jacques-Olivier Klein, Weisheng Zhao, Julie Grollier, Damien Querlioz
2015	J	`jnl`	Spintronics: Emerging Ultra-Low-Power Circuits and Systems beyond MOS Technology. ACM J. Emerg. Technol. Comput. Syst. Wang Kang, Yue Zhang, Zhaohao Wang, Jacques-Olivier Klein, Claude Chappert, Dafine Ravelosona, Gefei Wang, Youguang Zhang, Weisheng Zhao
2015	—	`conf`	Supervised learning with organic memristor devices and prospects for neural crossbar arrays. NANOARCH Christopher H. Bennett, Djaafar Chabi, Theo Cabaret, Bruno Jousselme, Vincent Derycke, Damien Querlioz, Jacques-Olivier Klein
2015	J	`jnl`	Synchronous 8-bit Non-Volatile Full-Adder based on Spin Transfer Torque Magnetic Tunnel Junction. IEEE Trans. Circuits Syst. I Regul. Pap. Erya Deng, Yue Zhang, Wang Kang, Bernard Dieny, Jacques-Olivier Klein, Guillaume Prenat, Weisheng Zhao
2015	C	`conf`	Vortex-based spin transfer oscillator compact model for IC design. ISCAS Nicolas Locatelli, Damir Vodenicarevic, Weisheng Zhao, Jacques-Olivier Klein, Julie Grollier, Damien Querlioz
2015	J	`jnl`	Yield and Reliability Improvement Techniques for Emerging Nonvolatile STT-MRAM. IEEE J. Emerg. Sel. Topics Circuits Syst. Wang Kang, Liuyang Zhang, Weisheng Zhao, Jacques-Olivier Klein, Youguang Zhang, Dafine Ravelosona, Claude Chappert
2014	—	`conf`	An overview of spin-based integrated circuits. ASP-DAC Wang Kang, Weisheng Zhao, Zhaohao Wang, Jacques-Olivier Klein, Yue Zhang, Djaafar Chabi, Youguang Zhang, Dafine Ravelosona, Claude Chappert
2014	J	`jnl`	Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses. Microelectron. Reliab. You Wang, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Lirida A. B. Naviner, Weisheng Zhao
2014	—	`conf`	Design and analysis of Racetrack memory based on magnetic domain wall motion in nanowires. NANOARCH Nesrine Ben Romdhane, Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Z. R. Wang, Dafine Ravelosona
2014	J	`jnl`	Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells. J. Parallel Distributed Comput. Weisheng Zhao, Jean-Michel Portal, Wang Kang, Mathieu Moreau, Yue Zhang, Hassen Aziza, Jacques-Olivier Klein, Zhaohao Wang, Damien Querlioz, Damien Deleruyelle, Marc Bocquet, Dafine Ravelosona, Christophe Muller, Claude Chappert
2014	B	`conf`	Ferroelectric tunnel memristor-based neuromorphic network with 1T1R crossbar architecture. IJCNN Zhaohao Wang, Weisheng Zhao, Wang Kang, Youguang Zhang, Jacques-Olivier Klein, Claude Chappert
2014	—	`ed.`	IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2014, Paris, France, July 8-10, 2014 NANOARCH Jacques-Olivier Klein, Csaba Andras Moritz, Sorin Cotofana
2014	—	`conf`	On-chip supervised learning rule for ultra high density neural crossbar using memristor for synapse and neuron. NANOARCH Djaafar Chabi, Zhaohao Wang, Weisheng Zhao, Jacques-Olivier Klein
2014	—	`conf`	One-step majority-logic-decodable codes enable STT-MRAM for high speed working memories. NVMSA Wang Kang, Weisheng Zhao, Lun Yang, Jacques-Olivier Klein, Youguang Zhang, Dafine Ravelosona
2014	J	`jnl`	Robust learning approach for neuro-inspired nanoscale crossbar architecture. ACM J. Emerg. Technol. Comput. Syst. Djaafar Chabi, Damien Querlioz, Weisheng Zhao, Jacques-Olivier Klein
2014	—	`conf`	Sneak paths effects in CBRAM memristive devices arrays for spiking neural networks. NANOARCH David Roclin, Olivier Bichler, Christian Gamrat, Jacques-Olivier Klein
2014	C	`conf`	Spin-transfer torque magnetic memory as a stochastic memristive synapse. ISCAS Adrien F. Vincent, Jerome Larroque, Weisheng Zhao, Nesrine Ben Romdhane, Olivier Bichler, Christian Gamrat, Jacques-Olivier Klein, Sylvie Galdin-Retailleau, Damien Querlioz
2014	A	`conf`	Spintronics for low-power computing. DATE Yue Zhang, Weisheng Zhao, Jacques-Olivier Klein, Wang Kang, Damien Querlioz, Youguang Zhang, Dafine Ravelosona, Claude Chappert
2014	J	`jnl`	Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. IEEE Trans. Circuits Syst. I Regul. Pap. Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang, Jean-Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert
2014	J	`jnl`	Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms. IEEE Trans. Circuits Syst. I Regul. Pap. Djaafar Chabi, Weisheng Zhao, Erya Deng, Yue Zhang, Nesrine Ben Romdhane, Jacques-Olivier Klein, Claude Chappert
2013	J	`jnl`	A low-cost built-in error correction circuit design for STT-MRAM reliability improvement. Microelectron. Reliab. Wang Kang, Weisheng Zhao, Zhaohao Wang, Yue Zhang, Jacques-Olivier Klein, Youguang Zhang, Claude Chappert, Dafine Ravelosona
2013	—	`conf`	Analytical study of complementary memristive synchronous logic gates. NANOARCH Jean-Michel Portal, Mathieu Moreau, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao
2013	B	`conf`	Design study of efficient digital order-based STDP neuron implementations for extracting temporal features. IJCNN David Roclin, Olivier Bichler, Christian Gamrat, Simon J. Thorpe, Jacques-Olivier Klein
2013	—	`conf`	Emerging hybrid logic circuits based on non-volatile magnetic memories. NEWCAS Weisheng Zhao, Guillaume Prenat, Jacques-Olivier Klein, Bernard Dieny, Claude Chappert, Dafine Ravelosona
2013	—	`conf`	Low power magnetic flip-flop based on checkpointing and self-enable mechanism. NEWCAS Djaafar Chabi, Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Claude Chappert
2013	J	`jnl`	Magnetic Adder Based on Racetrack Memory. IEEE Trans. Circuits Syst. I Regul. Pap. Hong-Phuc Trinh, Weisheng Zhao, Jacques-Olivier Klein, Yue Zhang, Dafine Ravelosona, Claude Chappert
2013	C	`conf`	Spin-electronics based logic fabrics. VLSI-SoC Weisheng Zhao, Jacques-Olivier Klein, Zhaohao Wang, Yue Zhang, Nesrine Ben Romdhane, Damien Querlioz, Dafine Ravelosona, Claude Chappert
2013	—	`conf`	Synchronous full-adder based on complementary resistive switching memory cells. NEWCAS Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller
2012	—	`conf`	Bioinspired networks with nanoscale memristive devices that combine the unsupervised and supervised learning approaches. NANOARCH Damien Querlioz, Weisheng Zhao, Philippe Dollfus, Jacques-Olivier Klein, Olivier Bichler, Christian Gamrat
2012	J	`jnl`	Cross-point architecture for spin transfer torque magnetic random access memory CoRR Weisheng Zhao, Sumanta Chaudhuri, Celso Accoto, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
2012	—	`conf`	Crossbar architecture based on 2R complementary resistive switching memory cell. NANOARCH Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Damien Querlioz, Djaafar Chabi, Dafine Ravelosona, Claude Chappert, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller
2012	J	`jnl`	Failure and reliability analysis of STT-MRAM. Microelectron. Reliab. Weisheng Zhao, Yue Zhang, Thibaut Devolder, Jacques-Olivier Klein, Dafine Ravelosona, Claude Chappert, Pascale Mazoyer
2012	C	`conf`	MRAM crossbar based configurable logic block. ISCAS Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert
2012	C	`conf`	Nanodevice-based novel computing paradigms and the neuromorphic approach. ISCAS Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein, Djaafar Chabi, Claude Chappert
2011	J	`jnl`	Design and Modeling of a Neuro-Inspired Learning Circuit Using Nanotube-Based Memory Devices. IEEE Trans. Circuits Syst. I Regul. Pap. Si-Yu Liao, Jean-Marie Retrouvey, Guillaume Agnus, Weisheng Zhao, Cristell Maneux, Sébastien Fregonese, Thomas Zimmer, Djaafar Chabi, Arianna Filoramo, Vincent Derycke, Christian Gamrat, Jacques-Olivier Klein
2011	J	`jnl`	Design considerations and strategies for high-reliable STT-MRAM. Microelectron. Reliab. Weisheng Zhao, Thibaut Devolder, Yahya Lakys, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
2011	—	`conf`	Design of MRAM based logic circuits and its applications. ACM Great Lakes Symposium on VLSI Weisheng Zhao, Lionel Torres, Yoann Guillemenet, Luis Vitorio Cargnini, Yahya Lakys, Jacques-Olivier Klein, Dafine Ravelosona, Gilles Sassatelli, Claude Chappert
2011	C	`conf`	Embedded MRAM for high-speed computing. VLSI-SoC Weisheng Zhao, Yue Zhang, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, D. Revelosona, Claude Chappert, Lionel Torres, Luis Vitorio Cargnini, Raphael Martins Brum, Yoann Guillemenet, Gilles Sassatelli
2011	—	`conf`	High Performance SoC Design Using Magnetic Logic and Memory. VLSI-SoC (Selected Papers) Weisheng Zhao, Lionel Torres, Luis Vitorio Cargnini, Raphael Martins Brum, Yue Zhang, Yoann Guillemenet, Gilles Sassatelli, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, Dafine Ravelosona, Claude Chappert
2011	—	`conf`	Magnetic Look-Up Table (MLUT) Featuring Radiation Hardness, High Performance and Low Power. ARC Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert
2011	—	`conf`	Robust neural logic block (NLB) based on memristor crossbar array. NANOARCH Djaafar Chabi, Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein
2010	—	`conf`	Design of embedded MRAM macros for memory-in-logic applications. ACM Great Lakes Symposium on VLSI Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
2010	B	`conf`	High Density Asynchronous LUT Based on Non-volatile MRAM Technology. FPL Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
2008	J	`jnl`	A Smart Architecture for Low-Level Image Computing. Int. J. Comput. Sci. Appl. Abdelhafid Elouardi, Samir Bouaziz, Antoine Dupret, Lionel Lacassagne, Jacques-Olivier Klein, Roger Reynaud
2007	J	`jnl`	Image Processing Vision Systems: Standard Image Sensors Versus Retinas. IEEE Trans. Instrum. Meas. Abdelhafid Elouardi, Samir Bouaziz, Antoine Dupret, Lionel Lacassagne, Jacques-Olivier Klein, Roger Reynaud
2007	C	`conf`	Synthesis of Finite State Machines with Magnetic Domain Wall Logic. ISCAS Jacques-Olivier Klein, Eric Belhaire, Claude Chappert, Florent Ouchet, Russell Cowburn, Dan Read, Dorothee Petit
2005	—	`conf`	Low Power Image Processing: Analog Versus Digital Comparison. CAMP Jacques-Olivier Klein, Lionel Lacassagne, Hervé Mathias, Sebastien Moutault, Antoine Dupret
2004	—	`conf`	An improved analog computation cell for Paris II, a programmable vision chip. ISCAS (5) Sebastien Moutault, Hervé Mathias, Jacques-Olivier Klein, Antoine Dupret
2002	J	`jnl`	A DSP-like analogue processing unit for smart image sensors. Int. J. Circuit Theory Appl. Antoine Dupret, Jacques-Olivier Klein, Abdallah Nshare