Jabulani Nyathi

18 papers A 2B 1C 2Journal 3Unranked 10

Year	Rank	Type	Title / Venue / Authors
2021	J	`jnl`	An experimental justification for the proportionality between the coherence bandwidth and the root mean square time delay spread using deterministic time of arrivals. Phys. Commun. Saqer Alhloul, Uri Rogers, Donald C. Richter, Jabulani Nyathi
2017	—	`conf`	Slowing the none-critical path to improve carry look-ahead adder power dissipation. MWSCAS Jabulani Nyathi, Abubaker Mutumba
2007	A	`conf`	Evaluation of CPU Utilization Under a Hardware-software Partitioned Enviroment (Migrating Software to Hardware). ESA Hsiang-Ling Jamie Lin, Jabulani Nyathi, Clint Cole
2007	—	`conf`	Multiple clock domain synchronization for network on chip architectures. SoCC Jabulani Nyathi, Souradip Sarkar, Partha Pratim Pande
2007	J	`jnl`	Serial Addition: Locally Connected Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray Robert Rydberg III, Walid Ibrahim
2006	—	`conf`	An Efficient Key Update Scheme For Wireless Sensor Networks. ICWN Kamini Prajapati, Jabulani Nyathi
2006	C	`conf`	Femto Joule Switching for Nano Electronics. AICCSA Valeriu Beiu, Jabulani Nyathi, Snorre Aunet, Mawahib H. Sulieman
2006	A	`conf`	Logic circuits operating in subthreshold voltages. ISLPED Jabulani Nyathi, Brent Bero
2005	—	`conf`	A distributed FIFO scheme for on chip communication. ISCAS (2) Ray Robert Rydberg III, Jabulani Nyathi, José G. Delgado-Frias
2005	J	`jnl`	Decoupled dynamic ternary content addressable memories. IEEE Trans. Circuits Syst. I Regul. Pap. José G. Delgado-Frias, Jabulani Nyathi, Suryanarayana Tatapudi
2005	—	`conf`	On the Advantages of Serial Architectures for Low-Power Reliable Computations. ASAP Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray Robert Rydberg III, Asbjørn Djupdal
2004	—	`conf`	A Distributed FIFO Scheme for System on Chip Inter-Component Communication. ESA/VLSI Ray Robert Rydberg III, Jabulani Nyathi, José G. Delgado-Frias
2004	—	`conf`	A High Performance, Low Area Overhead Carry Lookahead Adder. ESA/VLSI James Levy, Jabulani Nyathi
2004	B	`conf`	A charge recycling differential noise immune perceptron. IJCNN Jabulani Nyathi, Valeriu Beiu, Suryanarayana Tatapudi, David J. Betowski
2000	C	`conf`	A wave-pipelined CMOS associate router for communication switches. ISCAS José G. Delgado-Frias, Jabulani Nyathi
2000	—	`conf`	A wave-pipelined router architecture using ternary associative memory. ACM Great Lakes Symposium on VLSI José G. Delgado-Frias, Jabulani Nyathi, Laxmi N. Bhuyan
1998	—	`conf`	A VLSI High-Performance Encoder with Priority Lookahead. Great Lakes Symposium on VLSI José G. Delgado-Frias, Jabulani Nyathi
1996	—	`conf`	A VLSI Interconnection Network Router Using a D-CAM with Hidden Refresh. Great Lakes Symposium on VLSI José G. Delgado-Frias, Jabulani Nyathi, Chester L. Miller, Douglas H. Summerville