J. Paul Roth

17 papers A 2Journal 10Unranked 5
YearRankTypeTitle / Venue / Authors
1986 J jnl
Minimization by the
IEEE Trans. Computers
J. Paul Roth
1986 A conf
Statistical AC Test Coverage.
ITC
David M. Wu, Charles E. Radke, J. Paul Roth
1984 A conf
Test Generation for FET Switching Circuits.
ITC
J. Paul Roth, Vojin G. Oklobdzija, John F. Beetem
1984 — conf
VLSI Verification and Correction.
VLSI Engineering
J. Paul Roth
1978 J jnl
Programmed Logic Array Optimization.
IEEE Trans. Computers
J. Paul Roth
1977 J jnl
Hardware Verification.
IEEE Trans. Computers
J. Paul Roth
1972 — conf
Design of diagnosible automata.
ACM Annual Conference (1)
J. Paul Roth
1971 J jnl
A Heuristic Algorithm for the Testing of Asynchronous Circuits.
IEEE Trans. Computers
Gianfranco R. Putzolu, J. Paul Roth
1971 J jnl
Algorithms for Detection of Faults in Logic Circuits.
IEEE Trans. Computers
Willard G. Bouricius, Edward P. Hsieh, Gianfranco R. Putzolu, J. Paul Roth, Peter R. Schneider, Chung-Jen Tan
1970 J jnl
R70-12 Diagnosis of Single-Gate Failures in Combinational Circuits.
IEEE Trans. Computers
J. Paul Roth
1967 J jnl
Programmed Algorithms to Compute Tests to Detect and Distinguish Between Failures in Logic Circuits.
IEEE Trans. Electron. Comput.
J. Paul Roth, Willard G. Bouricius, Peter R. Schneider
1965 — conf
Systematic design of automata.
AFIPS Fall Joint Computing Conference (1)
J. Paul Roth
1962 J jnl
Minimization Over Boolean Graphs.
IBM J. Res. Dev.
J. Paul Roth, Richard M. Karp
1961 — conf
A computer program for the synthesis of combinational switching circuits
SWCT
Richard M. Karp, F. E. McFarlin, J. Paul Roth, J. R. Wilts
1961 — conf
Techniques for the diagnosis of switching circuit failures
SWCT
J. M. Galey, R. E. Norby, J. Paul Roth
1960 J jnl
Minimization over Boolean Trees.
IBM J. Res. Dev.
J. Paul Roth
1959 J jnl
Algebraic Topological Methods for the Synthesis of Switching Systems - Part III: Minimization of Nonsingular Boolean Trees.
IBM J. Res. Dev.
J. Paul Roth, Eric G. Wagner