J. J. Po-An Hsieh

30 papers C 8Journal 20Unranked 2
YearRankTypeTitle / Venue / Authors
2025 J jnl
Int. J. Humanoid Robotics
Gerasimos G. Rigatos, Masoud Abbaszadeh, Krishna Busawon, J. J. Po-An Hsieh
2025 J jnl
Inf. Syst. Res.
Che-Wei Liu, Sunil Mithas, Yang Pan, J. J. Po-An Hsieh
2024 J jnl
MIS Q.
Liwei Chen, J. J. Po-An Hsieh, Kimmy Wa Chan
2023 J jnl
Internet Res.
Rocky Chung-Ngam Cheng, Xiaohua Men, J. J. Po-An Hsieh, Zhuo June Cheng, Xiaocong Cui, Tiange Wang, Sheng-Hsun Hsu
2022 J jnl
MIS Q.
Wei He, J. J. Po-An Hsieh, Andreas Schroeder, Yulin Fang
2022 J jnl
Inf. Syst. Res.
Liwei Chen, J. J. Po-An Hsieh, Arun Rai
2021 J jnl
MIS Q.
Liwei Chen, J. J. Po-An Hsieh, Arun Rai, Sean Xin Xu
2017 C conf
ICIS
Xiang Wan, Jiye Mao, J. J. Po-An Hsieh, Fu Chen
2017 conf
HICSS
Junyi Yang, Alain Pinsonneault, J. J. Po-An Hsieh
2016 C conf
ICIS
Junyi Yang, Alain Pinsonneault, J. J. Po-An Hsieh
2015 J jnl
Eur. J. Inf. Syst.
Liwei Chen, J. J. Po-An Hsieh, Evert Van de Vliert, Xu Huang
2014 J jnl
Decis. Support Syst.
Heshan Sun, Yulin Fang, J. J. Po-An Hsieh
2014 J jnl
Commun. Assoc. Inf. Syst.
Clayton Arlen Looney, David Firth, Hope Koch, Dubravka Cecez-Kecmanovic, J. J. Po-An Hsieh, Christina Soh, Joseph S. Valacich, Edgar A. Whitley
2013 J jnl
Inf. Syst. Res.
Xixi Li, J. J. Po-An Hsieh, Arun Rai
2013 J jnl
Behav. Inf. Technol.
Wei Wang, Xixi Li, J. J. Po-An Hsieh
2012 J jnl
MIS Q.
J. J. Po-An Hsieh, Arun Rai, Stacie Petter, Ting Zhang
2012 J jnl
Inf. Soc.
J. J. Po-An Hsieh, Mark Keil, Jonny Holmström, Lynette Kvasny
2012 J jnl
Int. J. Hum. Comput. Interact.
Wei Wang, J. J. Po-An Hsieh, Baoxiang Song
2011 J jnl
Inf. Syst. Res.
J. J. Po-An Hsieh, Arun Rai, Mark Keil
2011 J jnl
Manag. Sci.
J. J. Po-An Hsieh, Arun Rai, Sean Xin Xu
2011 C conf
ICIS
Clayton Arlen Looney, David Firth, Hope Koch, Dubravka Cecez-Kecmanovic, J. J. Po-An Hsieh, Christina Soh, Joseph S. Valacich
2009 C conf
ICIS
Xixi Li, J. J. Po-An Hsieh, Arun Rai
2009 J jnl
Expert Syst. Appl.
Sheng-Hsun Hsu, J. J. Po-An Hsieh, Ting-Chih Chih, Kuei-Chu Hsu
2009 C conf
ICIS
Liwei Chen, J. J. Po-An Hsieh, Evert Van de Vliert, Xu Huang
2008 J jnl
J. Comput. Inf. Syst.
Wei Wang, John E. Butler, J. J. Po-An Hsieh, Sheng-Hsun Hsu
2007 C conf
ICIS
Xixi Li, J. J. Po-An Hsieh
2006 C conf
ICIS
Wei Wang, J. J. Po-An Hsieh
2006 J jnl
MIS Q.
J. J. Po-An Hsieh, Arun Rai, Mark Keil
2005 conf
AMCIS
J. J. Po-An Hsieh, Mark Keil, Arun Rai
2005 C conf
ICIS
J. J. Po-An Hsieh, Mark Keil, Arun Rai
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False