J. Gregory Steffan

58 papers A* 8A 9B 8Misc 8Journal 12Unranked 13

Year	Rank	Type	Title / Venue / Authors
2017	J	`jnl`	Reducing the Performance Gap between Soft Scalar CPUs and Custom Hardware with TILT. ACM Trans. Reconfigurable Technol. Syst. Ilian Tili, Kalin Ovtcharov, J. Gregory Steffan
2014	—	`conf`	Approaching overhead-free execution on FPGA soft-processors. FPT Charles Eric LaForest, Jason Helge Anderson, J. Gregory Steffan
2014	—	`conf`	Comparing performance, productivity and scalability of the TILT overlay processor to OpenCL HLS. FPT Rafat Rashid, J. Gregory Steffan, Vaughn Betz
2014	J	`jnl`	Composing Multi-Ported Memories on FPGAs. ACM Trans. Reconfigurable Technol. Syst. Charles Eric LaForest, Zimo Li, Tristan O'rourke, Ming G. Liu, J. Gregory Steffan
2014	J	`jnl`	DART: A Programmable Architecture for NoC Simulation on FPGAs. IEEE Trans. Computers Danyao Wang, Charles Lo, Jasmina Vasiljevic, Natalie D. Enright Jerger, J. Gregory Steffan
2014	Misc	`conf`	FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack. FCCM Stuart Byma, J. Gregory Steffan, Hadi Bannazadeh, Alberto Leon-Garcia, Paul Chow
2014	A	`conf`	Producing high-quality real-time HDR video system with FPGA (abstract only). FPGA Tao Ai, Mir Adnan Ali, J. Gregory Steffan, Kalin Ovtcharov, Sarmad Zulfiqar, Steve Mann
2014	Misc	`conf`	Speeding Up FPGA Placement: Parallel Algorithms and Methods. FCCM Matthew An, J. Gregory Steffan, Vaughn Betz
2014	Misc	`conf`	Virtualized Reconfigurable Hardware Resources in the SAVI Testbed. TRIDENTCOM Stuart Byma, Hadi Bannazadeh, Alberto Leon-Garcia, J. Gregory Steffan, Paul Chow
2013	Misc	`conf`	A Multithreaded VLIW Soft Processor Family. FCCM Kalin Ovtcharov, Ilian Tili, J. Gregory Steffan
2013	—	`conf`	Maximizing speed and density of tiled FPGA overlays via partitioning. FPT Charles Eric LaForest, J. Gregory Steffan
2013	B	`conf`	NetThreads-10G: Software packet processing on NetFPGA-10G in a virtualized networking environment demonstration abstract. FPL Stuart Byma, J. Gregory Steffan, Paul Chow
2013	B	`conf`	TILT: A multithreaded VLIW soft processor family. FPL Kalin Ovtcharov, Ilian Tili, J. Gregory Steffan
2012	—	`conf`	11th Compiler-Driven Performance Workshop. CASCON Ondrej Lhoták, José Nelson Amaral, Kit Barton, Martin Hirzel, J. Gregory Steffan
2012	—	`conf`	Caliper: Precise and Responsive Traffic Generator. Hot Interconnects Monia Ghobadi, Geoffrey Salmon, Yashar Ganjali, Martin Labrecque, J. Gregory Steffan
2012	B	`conf`	Compiler Support for Fine-Grain Software-Only Checkpointing. CC Chuck (Chengyan) Zhao, J. Gregory Steffan, Cristiana Amza, Allan Kielstra
2012	A	`conf`	Multi-ported memories for FPGAs via XOR. FPGA Charles Eric LaForest, Ming G. Liu, Emma Rae Rapati, J. Gregory Steffan
2012	J	`jnl`	Portable, Flexible, and Scalable Soft Vector Processors. IEEE Trans. Very Large Scale Integr. Syst. Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
2011	J	`jnl`	Application-specific signatures for transactional memory in soft processors. ACM Trans. Reconfigurable Technol. Syst. Martin Labrecque, Mark C. Jeffrey, J. Gregory Steffan
2011	—	`conf`	DART: A programmable architecture for NoC simulation on FPGAs. NOCS Danyao Wang, Natalie D. Enright Jerger, J. Gregory Steffan
2011	A	`conf`	NetTM: faster and easier synchronization for soft multicores via transactional memory. FPGA Martin Labrecque, J. Gregory Steffan
2011	—	`conf`	Programmer-assisted automatic parallelization. CASCON Diego Huang, J. Gregory Steffan
2011	J	`jnl`	The Potential for a GPU-Like Overlay Architecture for FPGAs. Int. J. Reconfigurable Comput. Jeffrey Kingyens, J. Gregory Steffan
2011	B	`conf`	Understanding bloom filter intersection for lazy address-set disambiguation. SPAA Mark C. Jeffrey, J. Gregory Steffan
2010	—	`conf`	9th Workshop on Compiler-Driven Performance. CASCON Clark Verbrugge, J. Gregory Steffan, Mark G. Stoodley, Kit Barton, Ondrej Lhoták
2010	—	`conf`	A GPU-inspired soft processor for high-throughput acceleration. IPDPS Workshops Jeffrey Kingyens, J. Gregory Steffan
2010	—	`conf`	Application-Specific Signatures for Transactional Memory in Soft Processors. ARC Martin Labrecque, Mark C. Jeffrey, J. Gregory Steffan
2010	A*	`conf`	Caliper: a tool to generate precise and closed-loop traffic. SIGCOMM Monia Ghobadi, Martin Labrecque, Geoffrey Salmon, Kaveh Aasaraai, Soheil Hassas Yeganeh, Yashar Ganjali, J. Gregory Steffan
2010	A	`conf`	Efficient multi-ported memories for FPGAs. FPGA Charles Eric LaForest, J. Gregory Steffan
2010	—	`conf`	Parallelizing FPGA placement using Transactional Memory. FPT Steven Birk, J. Gregory Steffan, Jason Helge Anderson
2010	A	`ed.`	Proceedings of the CGO 2010, The 8th International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April 24-28, 2010 CGO Andreas Moshovos, J. Gregory Steffan, Kim M. Hazelwood, David R. Kaeli
2010	—	`conf`	The case for hardware transactional memory in software packet processing. ANCS Martin Labrecque, J. Gregory Steffan
2009	B	`conf`	Data parallel FPGA workloads: Software versus hardware. FPL Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
2009	B	`conf`	Fast critical sections via thread scheduling for FPGA-based multithreaded processors. FPL Martin Labrecque, J. Gregory Steffan
2009	Misc	`conf`	Fine-grain performance scaling of soft vector processors. CASES Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
2009	A	`conf`	Soft vector processors vs FPGA custom hardware: measuring and reducing the gap. FPGA Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
2008	J	`jnl`	Compiler and hardware support for reducing the synchronization of speculative threads. ACM Trans. Archit. Code Optim. Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, Todd C. Mowry
2008	J	`jnl`	Incrementally parallelizing database transactions with thread-level speculation. ACM Trans. Comput. Syst. Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
2008	Misc	`conf`	Scaling Soft Processor Systems. FCCM Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan
2008	—	`conf`	The potential for variable-granularity access tracking for optimistic parallelism. MSPC Mihai Burcea, J. Gregory Steffan, Cristiana Amza
2008	Misc	`conf`	VESPA: portable, scalable, and flexible FPGA-based vector processors. CASES Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
2007	J	`jnl`	CMP Support for Large and Dependent Speculative Threads. IEEE Trans. Parallel Distributed Syst. Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
2007	J	`jnl`	Custom code generation for soft processors. SIGARCH Comput. Archit. News Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan
2007	J	`jnl`	Exploration and Customization of FPGA-Based Soft Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
2007	B	`conf`	Improving Pipelined Soft Processors with Multithreading. FPL Martin Labrecque, J. Gregory Steffan
2007	B	`conf`	JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory. PACT Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
2006	A*	`conf`	A probabilistic pointer analysis for speculative optimizations. ASPLOS Jeff Da Silva, J. Gregory Steffan
2006	A	`conf`	Application-specific customization of soft processor microarchitecture. FPGA Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
2006	A	`conf`	Improving cache locality for thread-level speculation. IPDPS Stanley L. C. Fung, J. Gregory Steffan
2006	A*	`conf`	Tolerating Dependences Between Large Speculative Threads Via Sub-Threads. ISCA Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
2005	A*	`conf`	Optimistic Intra-Transaction Parallelism on Chip Multiprocessors. VLDB Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
2005	J	`jnl`	The STAMPede approach to thread-level speculation. ACM Trans. Comput. Syst. J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry
2005	Misc	`conf`	The microarchitecture of FPGA-based soft processors. CASES Peter Yiannacouras, Jonathan Rose, J. Gregory Steffan
2004	A	`conf`	Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads. CGO Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry
2002	A*	`conf`	Compiler optimization of scalar value communication between speculative threads. ASPLOS Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry
2002	A*	`conf`	Improving Value Communication for Thread-Level Speculation. HPCA J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry
2000	A*	`conf`	A scalable approach to thread-level speculation. ISCA J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry
1998	A*	`conf`	The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization. HPCA J. Gregory Steffan, Todd C. Mowry