J. Greg Nash

12 papers A* 1B 1Misc 4Journal 4Unranked 2
YearRankTypeTitle / Venue / Authors
2014 Misc conf
High-throughput programmable systolic array FFT architecture and FPGA implementations.
ICNC
J. Greg Nash
2007 B conf
A High Performance Scalable FFT.
WCNC
J. Greg Nash
2007 — conf
A New Class of High Performance FFTs.
ICASSP (2)
J. Greg Nash
2005 Misc conf
Systolic Architecture for Computing the Discrete Fourier Transform on FPGAs.
FCCM
J. Greg Nash
2002 Misc conf
Automatic Latency-Optimal Design of FPGA-Based Systolic Arrays.
FCCM
J. Greg Nash
1993 J jnl
Heterogeneous Algorithms for Image Understanding Architecture.
Parallel Algorithms Appl.
Mary Mehrnoosh Eshaghian, J. Greg Nash, Muhammad E. Shaaban, David B. Shu
1991 — conf
Parallel Implementation of Image Understanding Tasks on Gated-Connection Networks.
IPPS
David B. Shu, J. Greg Nash, K. Kim
1989 J jnl
Parallel implementation of synthetic aperture radar algorithms.
J. VLSI Signal Process.
K. Wojtek Przytula, J. Greg Nash
1988 J jnl
Modified Faddeeva Algorithm for Concurrent Execution of Linear Algebraic Operations.
IEEE Trans. Computers
J. Greg Nash, Siegfried Hansen
1987 J jnl
The Systolic/Cellular System for Signal Processing.
Computer
J. Greg Nash, K. Wojtek Przytula, Siegfried Hansen
1985 A* conf
A systolic/cellular computer architecture for linear algebraic operations.
ICRA
J. Greg Nash
1985 Misc conf
VLSI Implementation of a linear systolic array.
ICASSP
J. Greg Nash, C. Petrozolin