Ivo Bolsens - RankMe

67 papers A* 9A 12B 3C 5Misc 1Journal 14Unranked 22

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	Bridging Divides: Unifying AI Architectures from from Edge to Cloud. MLCAD Ivo Bolsens
2021	—	`conf`	Scalable System and Silicon Architectures to Handle the Workloads of the Post-Moore Era. ISPD Ivo Bolsens
2020	—	`conf`	Scalable System and Silicon Architectures to Handle the Workloads of the Post-Moore Era. ISPD Ivo Bolsens
2017	B	`conf`	"All programmable FPGA, providing hardware efficiency to software programmers". FPL Ivo Bolsens
2017	—	`conf`	Pushing the boundaries of Moore's Law to transition from FPGA to All Programmable Platform. ISPD Ivo Bolsens
2014	—	`conf`	"All Programmable SOC FPGA for networking and computing in big data infrastructure". ASP-DAC Ivo Bolsens, Georges G. E. Gielen, Kaushik Roy, Ulf Schneider
2010	—	`conf`	FPGA platforms leading the way in the application of 'more than Moore's' technology. FPT Ivo Bolsens
2010	—	`conf`	Programming customized parallel architectures in FPGA. IPDPS Workshops Ivo Bolsens
2009	—	`conf`	NoCs: It is about the memory and the programming model. NOCS Ivo Bolsens
2008	B	`conf`	FPGA: The future platform for transforming, transporting and computing data. FPL Ivo Bolsens
2005	—	`conf`	Are we ready for system-level synthesis? ASP-DAC Jason Cong, Tony Ma, Ivo Bolsens, Phil Moorby, Jan M. Rabaey, John Sanguinetti, Kazutoshi Wakabayashi, Yoshi Watanabe
2005	—	`conf`	Plenary lecture [Second page is blank]. ECCTD Ivo Bolsens
2004	A*	`conf`	What happened to ASIC?: Go (recon)figure? DAC Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar
2003	J	`jnl`	A scalable MPEG-4 wavelet-based visual texture compression system with optimized memory organization. IEEE Trans. Circuits Syst. Video Technol. Bart Vanhoof, Lode Nachtergaele, Gauthier Lafruit, Mercedes Peón, Bart Masschelein, Francky Catthoor, Jan Bormans, Ivo Bolsens
2003	C	`conf`	Challenges and Opportunities for FPGA Programmable System Platforms. IOLTS Ivo Bolsens
2003	A*	`conf`	Fast, cheap and under control: the next implementation fabric. DAC Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi
2003	A	`conf`	Panel Title: Reconfigurable Computing - Different Perspectives. DATE Wolfgang Rosenstiel, Rudy Lauwereins, Ivo Bolsens, Chris Rowen, Yankin Tanurhan, Kees A. Vissers, S. Wang
2002	B	`conf`	Challenges and Opportunities for FPGA Platforms. FPL Ivo Bolsens
2002	A	`conf`	Design Technology for Networked Reconfigurable FPGA Platforms. DATE Steve Guccione, Diederik Verkest, Ivo Bolsens
2002	A	`conf`	Reconfigurable SoC - What Will it Look Like? DATE J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chris Wheddon, Bhusan Gupta, Yankin Tanurhan
2001	J	`jnl`	80-Mb/s QPSK and 72-Mb/s 64-QAM flexible and scalable digital OFDM transceiver ASICs for wireless local area networks in the 5-GHz band. IEEE J. Solid State Circuits Wolfgang Eberle, Veerle Derudder, Geert Vanwijnsberghe, Mario Vergara, Luc Deneire, Liesbet Van der Perre, Marc Engels, Ivo Bolsens, Hugo De Man
2001	A	`conf`	Efficient bit-error-rate estimation of multicarrier transceivers. DATE Gerd Vandersteen, Piet Wambacq, Yves Rolain, Johan Schoukens, Stéphane Donnay, Marc Engels, Ivo Bolsens
2001	—	`conf`	Hardware/software partitioning of embedded system in OCAPI-xl. CODES Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens
2001	A	`conf`	High-level simulation of substrate noise generation from large digital circuits with multiple supplies. DATE Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stéphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens
2001	J	`jnl`	Power and Speed-Efficient Code Transformation of Video Compression Algorithms for RISC Processors. J. VLSI Signal Process. Lode Nachtergaele, Toon Gijbels, Jan Bormans, Francky Catthoor, Ivo Bolsens
2000	A	`ed.`	2000 Design, Automation and Test in Europe (DATE 2000), 27-30 March 2000, Paris, France DATE Ivo Bolsens
2000	A*	`conf`	A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers. DAC Gerd Vandersteen, Piet Wambacq, Yves Rolain, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens
2000	J	`jnl`	Analysis and experimental verification of digital substrate noise generation for epi-type substrates. IEEE J. Solid State Circuits Marc van Heijningen, John Compiet, Piet Wambacq, Stéphane Donnay, Marc Engels, Ivo Bolsens
2000	J	`jnl`	Chip-package codesign of a low-power 5-GHz RF front end. Proc. IEEE Stéphane Donnay, Philip Pieters, Kristof Vaesen, Wim Diels, Piet Wambacq, Walter De Raedt, Eric Beyne, Marc Engels, Ivo Bolsens
2000	A	`conf`	Compact Modeling of Nonlinear Distortion in Analog Communication Circuits. DATE Piet Wambacq, Petr Dobrovolný, Stéphane Donnay, Marc Engels, Ivo Bolsens
2000	—	`conf`	Cost-Efficient C-Level Design of an MPEG-4 Video Decoder. PATMOS Kristof Denolf, Peter Vos, Jan Bormans, Ivo Bolsens
2000	A*	`conf`	High-level simulation of substrate noise generation including power supply noise coupling. DAC Marc van Heijningen, Mustafa Badaroglu, Stéphane Donnay, Marc Engels, Ivo Bolsens
1999	A	`conf`	A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. DATE Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens
1999	J	`jnl`	A Scalable Architecture for MPEG-4 Wavelet Quantization. J. VLSI Signal Process. Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Lode Nachtergaele, Ivo Bolsens
1999	A	`conf`	A Single-Package Solution for Wireless Transceivers. DATE Piet Wambacq, Stéphane Donnay, Hocine Ziad, Marc Engels, Hugo De Man, Ivo Bolsens
1999	—	`conf`	A scalable architecture for MPEG-4 embedded zero tree coding. CICC Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Marc Engels, Ivo Bolsens
1999	—	`conf`	BANDIT: embedding analog-to-digital converters on digital telecom ASICs. ICECS Stéphane Donnay, Marc van Heijningen, Mustafa Badaroglu, Wim Diels, Marc Engels, Ivo Bolsens, Yann A. Zinzius, Georges G. E. Gielen, Willy Sansen, Tony Fondén, Svante Signell
1999	A*	`conf`	Hardware Reuse at the Behavioral Level. DAC Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens
1999	—	`conf`	High-level simulation and power modelling of mixed-signal front-ends for digital telecommunications. ICECS Piet Wambacq, Gerd Vandersteen, Stéphane Donnay, Marc Engels, Ivo Bolsens, Erik Lauwers, Piet Vanassche, Georges G. E. Gielen
1999	C	`conf`	Implementation driven selection of wavelet filters for still image coding based on bitrange expansion. MMSP Bart Masschelein, Bart Vanhoof, Lode Nachtergaele, Jan Bormans, Ivo Bolsens
1999	A*	`conf`	Implementation of a Scalable MPEG-4 Wavelet-Based Visual Texture Compression System. DAC Lode Nachtergaele, Bart Vanhoof, Mercedes Peón, Gauthier Lafruit, Jan Bormans, Ivo Bolsens
1999	J	`jnl`	Optimal memory organization for scalable texture codecs in MPEG-4. IEEE Trans. Circuits Syst. Video Technol. Gauthier Lafruit, Lode Nachtergaele, Jan Bormans, Marc Engels, Ivo Bolsens
1999	A	`conf`	Single Chip or Hybrid System Integration. DATE Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick
1998	A*	`conf`	A Programming Environment for the Design of Complex High Speed ASICs. DAC Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
1998	C	`conf`	A Technique for Combined Virtual Prototyping and Hardware Design. International Workshop on Rapid System Prototyping Patrick Schaumont, Geert Vanmeerbeeck, E. Watzeels, Serge Vernalde, Marc Engels, Ivo Bolsens
1998	J	`jnl`	Low Power Digital Frequency Conversion Architectures. J. VLSI Signal Process. Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens
1997	J	`jnl`	Hardware/software co-design of digital telecommunication systems. Proc. IEEE Ivo Bolsens, Hugo J. De Man, Bill Lin, Karl van Rompaey, Steven Vercauteren, Diederik Verkest
1997	J	`jnl`	IP-based business conflicts. IEEE Des. Test Comput. Ivo Bolsens, Marco Cecchini
1997	—	`conf`	Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. ED&TC Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens
1997	J	`jnl`	Synthesis of pipelined DSP accelerators with dynamic scheduling. IEEE Trans. Very Large Scale Integr. Syst. Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man
1996	—	`conf`	A Hilbert fractal codec for region oriented compression of color images. ICECS Jan Bormans, Serge Vernalde, Jan Cornelis, Ivo Bolsens, Hugo De Man
1996	J	`jnl`	CoWare - A design environment for heterogeneous hardware/software systems. Des. Autom. Embed. Syst. Diederik Verkest, Karl van Rompaey, Ivo Bolsens, Hugo De Man
1996	—	`conf`	CoWare - a design environment for heterogenous hardware/software systems. EURO-DAC Karl van Rompaey, Ivo Bolsens, Hugo De Man, Diederik Verkest
1996	A*	`conf`	Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. DAC Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Fréhel, Ahmed Amine Jerraya, Ivo Bolsens
1996	Misc	`conf`	Designing Systems On Silicon: A Digital Spread Spectrum Pager. VLSI Design S. Samel, Bert Gyselinckx, Ivo Bolsens, Hugo De Man
1995	—	`conf`	Search space reduction through clustering in test generation. EURO-DAC Zohair Sahraoui, Paul Six, Ivo Bolsens, Hugo De Man
1995	—	`conf`	Synthesis of pipelined DSP accelerators with dynamic scheduling. ISSS Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man
1994	—	`conf`	ASIC synthesis of a flexible 80 Mbit/s Reed-Solomon Codec. EURO-DAC Koen Van Nieuwenhove, Kjell Cools, D. Devisch, Ivo Bolsens, Serge Vernalde, Kim Chansik, R. B. W. Lee, Oh Younguk
1994	A	`conf`	Design of heterogeneous ICs for mobile and personal communication systems. ICCAD Gert Goossens, Ivo Bolsens, Bill Lin, Francky Catthoor
1993	—	`book`	High-level synthesis for real-time digital signal processing. Jan Vanhoof, Karl van Rompaey, Ivo Bolsens, Gert Goossens, Hugo De Man
1993	J	`jnl`	SMILE: A scalable microcontroller library element. Microprocess. Microprogramming A. K. Betts, Ivo Bolsens, Etienne Sicard, Marc Renaudin, Adrian Johnstone
1992	C	`conf`	Just in Time Scheduling. ICCD Karl van Rompaey, Ivo Bolsens, Hugo De Man
1992	—	`conf`	Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks. Synthesis for Control Dominated Circuits Evagelos Katsadas, Zohair Sahraoui, Maryse Wouters, Veerle Derudder, Ivo Bolsens, Paul Six, Hugo De Man
1991	A	`conf`	Compiling Multi-Dimensional Data Streams into Distributed DSP ASIC Memory. ICCAD Jan Vanhoof, Ivo Bolsens, Hugo De Man
1990	C	`conf`	Derivation of signal flow direction in MOS VLSI: an alternative. ICCD W. De Rammelaere, Ivo Bolsens, Luc J. M. Claesen, Hugo De Man
1989	A*	`conf`	Electrical Debugging of Synchronous MOS VLSI Circuits Exploiting Analysis of the Intended Logic Behaviour. DAC Ivo Bolsens, W. De Rammelaere, Luc J. M. Claesen, Hugo De Man
1985	J	`jnl`	DIALOG: An Expert Debugging System for MOSVLSI Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hugo De Man, Ivo Bolsens, E. Vanden Meersch, Johan Van Cleynenbreugel