Iuri Mehr

19 papers C 2Journal 10Unranked 7
YearRankTypeTitle / Venue / Authors
2014 J jnl
A 40 nm Fully Integrated 82 mW Stereo Headphone Module for Mobile Applications.
IEEE J. Solid State Circuits
Khaled Abdelfattah, Sherif Galal, Iuri Mehr, Alex Jianzhong Chen, Chengyue Yu, Maurice Tjie, Ahmet Tekin, Xicheng Jiang, Todd Brooks
2013 — conf
A 62mW stereo class-G headphone driver with 108dB dynamic range and 600µA/channel quiescent current.
ISSCC
Jianlong Chen, Sasi Kumar Arunachalam, Todd Brooks, Iuri Mehr, Felix Cheung, Hariprasath Venkatram
2013 — conf
A direct-battery hookup, fully integrated stereo headphone module with 82 mW output power and 110 dB PSRR.
CICC
Khaled Abdelfattah, Sherif Galal, Iuri Mehr, Alex Jianzhong Chen, Ahmet Tekin, Xicheng Jiang, Todd Brooks
2012 J jnl
A 60 mW Class-G Stereo Headphone Driver for Portable Battery-Powered Devices.
IEEE J. Solid State Circuits
Sherif Galal, Hui Zheng, Khaled Abdelfattah, Vinay Chandrasekhar, Iuri Mehr, Alex Jianzhong Chen, John Platenak, Nir Matalon, Todd Brooks
2011 — conf
A 60mW 1.15mA/channel Class-G Stereo Headphone Driver with 111dB DR and 120dB PSRR.
CICC
Sherif Galal, Hui Zheng, Khaled Abdelfattah, Vinay Chandrasekhar, Iuri Mehr, Alex Jianzhong Chen, John Platenak, Nir Matalon, Todd Brooks
2007 J jnl
A High Dynamic Range CMOS Variable Gain Amplifier for Mobile DTV Tuner.
IEEE J. Solid State Circuits
Jianhong Xiao, Iuri Mehr, José Silva-Martínez
2006 J jnl
A 375-mW Quadrature Bandpass$\Delta\Sigma$ADC With 8.5-MHz BW and 90-dB DR at 44 MHz.
IEEE J. Solid State Circuits
Richard Schreier, Nazmy Abaskharoun, Hajime Shibata, Donald Paterson, Steven Rose, Iuri Mehr, Qui Luu
2006 — conf
A 375mW Quadrature Bandpass ΔΣ ADC with 90dB DR and 8.5MHz BW at 44MHz.
ISSCC
Richard Schreier, Nazmy Abaskharoun, Hajime Shibata, Iuri Mehr, Steve Rose, Donald Paterson
2002 J jnl
A 12-bit integrated analog front end for broadband wireline networks.
IEEE J. Solid State Circuits
Iuri Mehr, Prabir C. Maulik, Donald Paterson
2001 — conf
A 12-bit integrated analog front-end for broadband wireline networks.
CICC
Iuri Mehr, Prabir C. Maulik, Donald Paterson
2001 J jnl
A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input.
IEEE J. Solid State Circuits
Wenhua William Yang, Dan Kelly, Iuri Mehr, Mark T. Sayuk, Larry Singer
2000 J jnl
A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC.
IEEE J. Solid State Circuits
Iuri Mehr, Larry Singer
1999 J jnl
A 500-MSample/s, 6-bit Nyquist-rate ADC for disk-drive read-channel applications.
IEEE J. Solid State Circuits
Iuri Mehr, Declan Dalton
1999 — conf
A 55-mW, 10-bit, 10 Msample/s Nyquist rate CMOS ADC.
CICC
Iuri Mehr, Larry Singer
1997 J jnl
A CMOS continuous-time G
IEEE J. Solid State Circuits
Iuri Mehr, David R. Welland
1996 J jnl
Parallel neural network learning through repetitive bounded depth trajectory branching.
Neural Parallel Sci. Comput.
Zoran Obradovic, Iuri Mehr
1994 C conf
A 16-Bit Current Sample/Hold Circuit Using a Digital CMOS Process.
ISCAS
Iuri Mehr, Terry Sculley
1994 C conf
High Speed Analog Filtering Using Feedforward Neural Network Architectures.
ISCAS
Yiren Chu, Iuri Mehr, Terry Sculley
1994 — conf
Parallel Neural Network Learning Through Repetitive Bounded Depth Trajectory Branching.
IPPS
Iuri Mehr, Zoran Obradovic