Ismet Bayraktaroglu

35 papers A* 3A 8C 1Misc 6Journal 9Unranked 8
YearRankTypeTitle / Venue / Authors
2023 J jnl
ChipNeMo: Domain-Adapted LLMs for Chip Design.
CoRR
Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby, Chris Cheng, Nathaniel Ross Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Brucek Khailany, Kishor Kunal, Xiaowei Li, Hao Liu, Stuart F. Oberman, Sujeet Omar, Sreedhar Pratty, Jonathan Raiman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P. Suthar, Varun Tej, Kaizhe Xu, Haoxing Ren
2006 A conf
Cache Resident Functional Microprocessor Testing: Avoiding High Speed IO Issues.
ITC
Ismet Bayraktaroglu, Jim Hunt, Daniel Watkins
2005 Misc conf
Highly Configurable Programmable Built-In Self Test Architecture for High-Speed Memories.
VTS
Ismet Bayraktaroglu, Olivier Caty, Yickkei Wong
2005 A conf
Microprocessor silicon debug based on failure propagation tracing.
ITC
Olivier Caty, Peter Dahlgren, Ismet Bayraktaroglu
2005 J jnl
The Construction of Optimal Deterministic Partitionings in Scan-Based BIST Fault Diagnosis: Mathematical Foundations and Cost-Effective Implementations.
IEEE Trans. Computers
Ismet Bayraktaroglu, Alex Orailoglu
2004 — conf
ATPG based functional test for data paths: application to a floating point unit.
HLDVT
Ismet Bayraktaroglu, Manuel d'Abreu
2004 J jnl
Enhancing reliability of RTL controller-datapath circuits via Invariant-based concurrent test.
IEEE Trans. Reliab.
Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu
2004 J jnl
Seamless Test of Digital Components in Mixed-Signal Paths.
IEEE Des. Test Comput.
Sule Ozev, Ismet Bayraktaroglu, Alex Orailoglu
2003 J jnl
Concurrent Application of Compaction and Compression for Test Time and Data Volume Reduction in Scan Designs.
IEEE Trans. Computers
Ismet Bayraktaroglu, Alex Orailoglu
2003 Misc conf
Decompression Hardware Determination for Test Volume and Time Reduction through Unified Test Pattern Compaction and Compression.
VTS
Ismet Bayraktaroglu, Alex Orailoglu
2003 A conf
Instruction Based BIST for Board/System Level Test of External Memories and Internconnects.
ITC
Olivier Caty, Ismet Bayraktaroglu, Amitava Majumdar, Richard Lee, John Bell, Lisa Curhan
2003 J jnl
Reducing Average and Peak Test Power Through Scan Chain Modification.
J. Electron. Test.
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu
2003 A* conf
Test application time and volume compression through seed overlapping.
DAC
Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu
2002 J jnl
Cost-Effective Deterministic Partitioning for Rapid Diagnosis in Scan-Based BIST.
IEEE Des. Test Comput.
Ismet Bayraktaroglu, Alex Orailoglu
2002 — conf
Dynamic test data transformations for average and peak power reductions.
ETW
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu
2002 A conf
Gate Level Fault Diagnosis in Scan-Based BIST.
DATE
Ismet Bayraktaroglu, Alex Orailoglu
2002 A conf
Scan Power Reduction Through Test Data Transition Frequency Analysis.
ITC
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu
2002 Misc conf
Test Power Reduction through Minimization of Scan Chain Transitions.
VTS
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailoglu
2001 J jnl
Concurrent test for digital linear systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ismet Bayraktaroglu, Alex Orailoglu
2001 A conf
Diagnosis for scan-based BIST: reaching deep into the signatures.
DATE
Ismet Bayraktaroglu, Alex Orailoglu
2001 — conf
Improved Methods for Fault Diagnosis in Scan-Based BIST.
LATW
Ismet Bayraktaroglu, Alex Orailoglu
2001 — conf
Selecting a PRPG: Randomness, Primitiveness, or Sheer Luck?
Asian Test Symposium
Ismet Bayraktaroglu, Alex Orailoglu
2001 A* conf
Test Volume and Application Time Reduction Through Scan Chain Concealment.
DAC
Ismet Bayraktaroglu, Alex Orailoglu
2000 — conf
Accumulation-based concurrent fault detection for linear digital state variable systems.
Asian Test Symposium
Ismet Bayraktaroglu, Alex Orailoglu
2000 Misc conf
Cost effective digital filter design for concurrent test.
ICASSP
Ismet Bayraktaroglu, Alex Orailoglu
2000 A conf
Deterministic partitioning techniques for fault diagnosis in scan-based BIST.
ITC
Ismet Bayraktaroglu, Alex Orailoglu
2000 A* conf
Improved fault diagnosis in scan-based BIST via superposition.
DAC
Ismet Bayraktaroglu, Alex Orailoglu
2000 Misc conf
Invariance-Based On-Line Test for RTL Controller-Datapath Circuits.
VTS
Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu
2000 — conf
Low cost concurrent test implementation for linear digital systems.
ETW
Ismet Bayraktaroglu, Alex Orailoglu
2000 A conf
Test Synthesis for Mixed-Signal SOC Paths.
DATE
Sule Ozev, Ismet Bayraktaroglu, Alex Orailoglu
2000 C conf
Unifying methodologies for high fault coverage concurrent and off-line test of digital filters.
ISCAS
Ismet Bayraktaroglu, Alex Orailoglu
1999 J jnl
ANNSyS: an Analog Neural Network Synthesis System.
Neural Networks
Ismet Bayraktaroglu, Arif Selçuk Ögrenci, Günhan Dündar, Sina Balkir, Ethem Alpaydin
1999 Misc conf
Low-Cost On-Line Test for Digital Filters.
VTS
Ismet Bayraktaroglu, Alex Orailoglu
1998 — conf
An Examination of PRPG Selection Approaches for Large, Industrial Designs.
Asian Test Symposium
Ismet Bayraktaroglu, K. Udawatta, Alex Orailoglu
1997 — conf
ANNSyS (an analog neural network synthesis system).
ICNN
Ismet Bayraktaroglu, Arif Selçuk Ögrenci, Günhan Dündar, Sina Balkir, Ethem Alpaydin