Isidoro Urriza

18 papers A 1B 2C 4Journal 10Unranked 1
YearRankTypeTitle / Venue / Authors
2015 J jnl
Implementation of an FPGA-Based Online Hardware-in-the-Loop Emulator Using High-Level Synthesis Tools for Resonant Power Converters Applied to Induction Heating Appliances.
IEEE Trans. Ind. Electron.
Óscar Jiménez, Oscar Lucía, Isidoro Urriza, Luis Angel Barragan, Denis Navarro, Venkata Dinavahi
2015 — conf
Reduced-order model of a half-bridge series resonant inverter for power control in domestic induction heating applications.
ICIT
Alberto Domínguez, Luis Angel Barragan, José Ignacio Artigas, Aránzazu Otín, Isidoro Urriza, Denis Navarro
2014 J jnl
Analysis and Implementation of FPGA-Based Online Parametric Identification Algorithms for Resonant Power Converters.
IEEE Trans. Ind. Informatics
Óscar Jiménez, Oscar Lucía, Isidoro Urriza, Luis Angel Barragan, Denis Navarro
2014 J jnl
Design and Evaluation of a Low-Cost High-Performance ΣΔ ADC for Embedded Control Systems in Induction Heating Appliances.
IEEE Trans. Ind. Electron.
Óscar Jiménez, Oscar Lucía, Isidoro Urriza, Luis Angel Barragan, Denis Navarro
2014 C conf
Small-signal model of dual half-bridge series resonant inverter sharing resonant capacitor for domestic induction heating.
IECON
Alberto Dominguez Vicente, Luis Angel Barragan, Aránzazu Otín, José Ignacio Artigas, Isidoro Urriza, Denis Navarro
2013 J jnl
FPGA-Based Test-Bench for Resonant Inverter Load Characterization.
IEEE Trans. Ind. Informatics
Óscar Jiménez, Oscar Lucía, Luis Angel Barragan, Denis Navarro, José Ignacio Artigas, Isidoro Urriza
2013 C conf
Frequency-to-output-power transfer function measurement of a resonant inverter for domestic induction heating applications.
IECON
Alberto Domínguez, Aránzazu Otín, Luis Angel Barragan, José Ignacio Artigas, Denis Navarro, Isidoro Urriza
2013 J jnl
High-Level Synthesis for Accelerating the FPGA Implementation of Computationally Demanding Control Algorithms for Power Converters.
IEEE Trans. Ind. Informatics
Denis Navarro, Oscar Lucía, Luis Angel Barragan, Isidoro Urriza, Óscar Jiménez
2012 C conf
FPGA-based 2
IECON
Óscar Jiménez, Oscar Lucía, Isidoro Urriza, Luis Angel Barragan, José Ignacio Artigas, Denis Navarro
2011 J jnl
A Versatile Power Electronics Test-Bench Architecture Applied to Domestic Induction Heating.
IEEE Trans. Ind. Electron.
Oscar Lucía, Luis Angel Barragan, José M. Burdio, Óscar Jiménez, Denis Navarro, Isidoro Urriza
2010 J jnl
Word Length Selection Method for Controller Implementation on FPGAs Using the VHDL-2008 Fixed-Point and Floating-Point Packages.
EURASIP J. Embed. Syst.
Isidoro Urriza, Luis Angel Barragan, Denis Navarro, José Ignacio Artigas, Oscar Lucía
2009 J jnl
Power Measurement by Output-Current Integration in Series Resonant Inverters.
IEEE Trans. Ind. Electron.
José Ignacio Artigas, Isidoro Urriza, Jesús Acero, Luis Angel Barragan, Denis Navarro, José M. Burdio
2008 J jnl
FPGA Implementation of a Switching Frequency Modulation Circuit for EMI Reduction in Resonant Inverters for Induction Heating Appliances.
IEEE Trans. Ind. Electron.
Luis Angel Barragan, Denis Navarro, Jesús Acero, Isidoro Urriza, José M. Burdio
2002 B conf
Implementing Converters in FPLD.
FPL
Alfredo Sanz, José I. García-Nicolás, Isidoro Urriza
2001 B conf
A System on Chip for Power Line Communications According to European Home Systems Specifications.
FPL
Isidoro Urriza, José I. García-Nicolás, Alfredo Sanz, Antonio Valdovinos
2001 J jnl
VLSI Implementation of Discrete Wavelet Transform for Lossless Compression of Medical Images.
Real Time Imaging
Isidoro Urriza, José Ignacio Artigas, Luis Angel Barragan, J. I. García, Denis Navarro
1998 A conf
VLSI Architecture for Lossless Compression of Medical Images Using the Discrete Wavelet Transform.
DATE
Isidoro Urriza, José Ignacio Artigas, José I. García-Nicolás, Luis Angel Barragan, Denis Navarro
1997 C conf
Instruction issue system for superscalar processors.
PDP
Isidoro Urriza, J. I. García, Denis Navarro