Isabel Ramos

25 papers A 2B 3Journal 9Unranked 11
YearRankTypeTitle / Venue / Authors
2021 J jnl
J. Web Eng.
Ayman Meidan, Julián Alberto García-García, Isabel Ramos, David Lizcano Casas, María José Escalona
2015 J jnl
Inf. Softw. Technol.
Ana M. Fernández-Sáez, Marcela Genero, Michel R. V. Chaudron, Danilo Caivano, Isabel Ramos
2013 J jnl
Inf. Softw. Technol.
Natalia Juristo Juzgado, Sira Vegas, Martín Solari, Silvia Abrahão, Isabel Ramos
2013 A conf
EASE
Ana M. Fernández-Sáez, Michel R. V. Chaudron, Marcela Genero, Isabel Ramos
2012 A conf
ICST
Natalia Juristo Juzgado, Sira Vegas, Martín Solari, Silvia Abrahão, Isabel Ramos
2009 conf
ICSP
Javier Navascués, Isabel Ramos, Miguel Toro
2008 J jnl
J. Syst. Softw.
Javier Aroba Páez, Juan Jose Cuadrado-Gallego, Miguel-Ángel Sicilia, Isabel Ramos, Elena García-Barriocanal
2005 J jnl
Softw. Process. Improv. Pract.
Mercedes Ruiz, Isabel Ramos, Miguel Toro
2004 J jnl
Softw. Process. Improv. Pract.
Mercedes Ruiz, Isabel Ramos, Miguel Toro
2004 conf
ICEIS (2)
Jacinto Mata Vázquez, José Luis Álvarez Macías, José Cristóbal Riquelme Santos, Isabel Ramos
2004 B conf
PROFES
Mercedes Ruiz, Isabel Ramos, Miguel Toro
2003 conf
ICEIS (2)
José Luis Álvarez Macías, Jacinto Mata Vázquez, José Cristóbal Riquelme Santos, Isabel Ramos
2003 conf
QSIC
Jacinto Mata Vázquez, José Luis Álvarez Macías, José Cristóbal Riquelme Santos, Isabel Ramos, Jesús S. Aguilar-Ruiz, Francisco J. Ferrer-Troyano
2002 J jnl
Softw. Qual. J.
Mercedes Ruiz, Isabel Ramos, Miguel Toro
2002 B conf
PROFES
Jesús S. Aguilar-Ruiz, José Cristóbal Riquelme Santos, Daniel Rodríguez, Isabel Ramos
2002 B conf
PROFES
Mercedes Ruiz, Isabel Ramos, Miguel Toro
2002 conf
JISBD
Mercedes Ruiz-Carreira, Isabel Ramos, Miguel Toro
2002 conf
GECCO Late Breaking Papers
Jesús S. Aguilar-Ruiz, José Cristóbal Riquelme Santos, Isabel Ramos
2002 conf
JISBD
José Cristóbal Riquelme Santos, Isabel Ramos, José Luis Álvarez Macías, Jacinto Mata Vázquez, Jesús S. Aguilar-Ruiz, Francisco J. Ferrer-Troyano
2001 J jnl
J. Syst. Softw.
Mercedes Ruiz, Isabel Ramos, Miguel Toro
2001 J jnl
Inf. Softw. Technol.
Jesús S. Aguilar-Ruiz, Isabel Ramos, José Cristóbal Riquelme Santos, Miguel Toro
2001 conf
ICEIS (1)
Isabel Ramos, José Cristóbal Riquelme Santos, Javier Aroba Páez
2001 conf
ADIS
Mercedes Ruiz, Isabel Ramos, Miguel Toro
2001 conf
JISBD
José Cristóbal Riquelme Santos, Isabel Ramos, Jesús S. Aguilar-Ruiz, Francisco J. Ferrer-Troyano, Miguel Toro, José Javier Dolado, A. Ruiz de Infante, Javier Tuya, P. Fernández, M. A. Prieto, Mercedes Ruiz-Carreira, Daniel Rodríguez-García, Manoranjan Satpathy, Rachel Harrison, R. Matilla, M. A. Álvarez
2000 conf
JISBD
Isabel Ramos, Javier Aroba Páez, José Cristóbal Riquelme Santos
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False