Irina Alam

13 papers A* 1A 1B 2Journal 4Unranked 3
YearRankTypeTitle / Venue / Authors
2024 J jnl
Achieving DRAM-Like PCM by Trading Off Capacity for Latency.
IEEE Trans. Computers
Irina Alam, Puneet Gupta
2023 J jnl
DRDebug: Automated Design Rule Debugging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Irina Alam, Tianmu Li, Sean Brock, Puneet Gupta
2022 A conf
COMET: On-die and In-controller Collaborative Memory ECC Technique for Safer and Stronger Correction of DRAM Errors.
DSN
Irina Alam, Puneet Gupta
2021 A* conf
Designing a 2048-Chiplet, 14336-Core Waferscale Processor.
DAC
Saptadeep Pal, Jingyang Liu, Irina Alam, Nicholas Cebry, Haris Suhail, Shi Bu, Subramanian S. Iyer, Sudhakar Pamarti, Rakesh Kumar, Puneet Gupta
2021 — —
Lightweight Opportunistic Memory Resilience
Irina Alam
2020 — conf
SAME-Infer: Software Assisted Memory Resilience for Efficient Inference at the Edge.
MEMSYS
Irina Alam, Puneet Gupta
2019 — conf
Compression with multi-ECC: enhanced error resiliency for magnetic memories.
MEMSYS
Irina Alam, Saptadeep Pal, Puneet Gupta
2019 J jnl
Context-Aware Resiliency: Unequal Message Protection for Random-Access Memories.
IEEE Trans. Inf. Theory
Clayton Schoeny, Frederic Sala, Mark Gottscho, Irina Alam, Puneet Gupta, Lara Dolecek
2018 B conf
Error Correction and Detection for Computing Memories Using System Side Information.
ITW
Clayton Schoeny, Irina Alam, Mark Gottscho, Puneet Gupta, Lara Dolecek
2018 — —
Lightweight Fault Tolerance in SRAM Based On-Chip Memories.
Irina Alam
2018 — conf
Parity++: Lightweight Error Correction for Last Level Caches.
DSN Workshops
Irina Alam, Clayton Schoeny, Lara Dolecek, Puneet Gupta
2017 B conf
Context-aware resiliency: Unequal message protection for random-access memories.
ITW
Clayton Schoeny, Frederic Sala, Mark Gottscho, Irina Alam, Puneet Gupta, Lara Dolecek
2017 J jnl
Low-Cost Memory Fault Tolerance for IoT Devices.
ACM Trans. Embed. Comput. Syst.
Mark Gottscho, Irina Alam, Clayton Schoeny, Lara Dolecek, Puneet Gupta