Ireneusz Mrozek

17 papers C 1Journal 9Unranked 6

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	Universal Address Sequence Generator for Memory Built-in Self-test. CoRR Ireneusz Mrozek, Nikolai A. Shevchenko, Vyacheslav N. Yarmolik
2022	J	`jnl`	Universal Address Sequence Generator for Memory Built-in Self-test. Fundam. Informaticae Ireneusz Mrozek, Nikolai A. Shevchenko, Vyacheslav N. Yarmolik
2021	J	`jnl`	Transparent Memory Tests Based on the Double Address Sequences. Entropy Ireneusz Mrozek, Vyacheslav N. Yarmolik
2018	—	`conf`	Pseudo-Exhaustive Random Access Memory Testing Based on March Tests with Random Background Variation. EWDTS Ireneusz Mrozek, Vyacheslav N. Yarmolik
2017	—	`conf`	Optimal Controlled Random Tests. CISIM Ireneusz Mrozek, Vyacheslav N. Yarmolik
2017	J	`jnl`	Two-Run RAM March Testing with Address Decimation. J. Circuits Syst. Comput. Ireneusz Mrozek, Vyacheslav N. Yarmolik
2016	—	`conf`	Methods of Synthesis of Controlled Random Tests. CISIM Ireneusz Mrozek, Vyacheslav N. Yarmolik
2016	J	`jnl`	Multiple Controlled Random Testing. Fundam. Informaticae Ireneusz Mrozek, Vyacheslav N. Yarmolik
2015	J	`jnl`	Controlled method of random test synthesis. Autom. Control. Comput. Sci. Vyacheslav N. Yarmolik, Ireneusz Mrozek, Svetlana V. Yarmolik
2013	—	`conf`	Analyses of two run march tests with address decimation for BIST procedure. EWDTS Ireneusz Mrozek, Svetlana V. Yarmolik
2012	J	`jnl`	Antirandom Test Vectors for BIST in Hardware/Software Systems. Fundam. Informaticae Ireneusz Mrozek, Vyacheslav N. Yarmolik
2012	J	`jnl`	Iterative Antirandom Testing. J. Electron. Test. Ireneusz Mrozek, Vyacheslav N. Yarmolik
2010	J	`jnl`	Analysis of multibackground memory testing techniques. Int. J. Appl. Math. Comput. Sci. Ireneusz Mrozek
2008	—	`conf`	Multi Background Memory Testing. CISIM Ireneusz Mrozek, Vyacheslav N. Yarmolik, Eugenia Buslowska
2008	C	`conf`	Optimal Backgrounds Selection for Multi Run Memory Testing. DDECS Ireneusz Mrozek, Vyacheslav N. Yarmolik
2007	—	`conf`	Address Sequences Generation for Multiple Run Memory Testing. CISIM S. V. Yarmolik, Ireneusz Mrozek, Bartosz Sokol
2005	—	`ch.`	Impact of the address changing on the detection of pattern sensitive faults. Information Processing and Security Systems Bartosz Sokol, Ireneusz Mrozek, Wiaczeslaw Yarmolik