Ing-Jer Huang - RankMe

67 papers A* 9A 3C 5Journal 24Unranked 26

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Smart turtle farm: soft-shell turtle nesting behavior recognition and monitoring system. Comput. Electron. Agric. Alexander Munyaev, Ben-Lin Jiang, Ing-Jer Huang
2023	—	`conf`	Focusing on the Key Suspicious Trojan Nets with a Collaborative Approach. ISQED Shih-Jung Pao, Chuan-Pin Huang, Yen-Chi Peng, Ing-Jer Huang
2022	—	`conf`	Critical Signature Assertion and On-the-Fly Recovery for Control Flow Errors in Processors. MCSoC Ing-Jer Huang, Yi-Ju Ke, Shih-Jung Pao
2021	J	`jnl`	Creating a Scoring System with an Armband Wearable Device for Table Tennis Forehand Loop Training: Combined Use of the Principal Component Analysis and Artificial Neural Network. Sensors Wen-Lan Wu, Jing-Min Liang, Chien-Fei Chen, Kuei-Lan Tsai, Nian-Shing Chen, Kuo-Chin Lin, Ing-Jer Huang
2019	C	`conf`	A Bio-Sensing System-on-Chip and Software for Smart Clothes. ICCE Hsu-Kang Dow, Ing-Jer Huang, Robert Rieger, Ko-Chi Kuo, Lan-Yuen Guo, Shih-Jung Pao
2018	J	`jnl`	A Reconfigurable Cache for Efficient Use of Tag RAM as Scratch-Pad Memory. IEEE Trans. Very Large Scale Integr. Syst. Ing-Jer Huang, Chun-Hung Lai, Yun-Chung Yang, Hsu-Kang Dow, Hung-Lun Chen
2016	—	`conf`	A unified GDB-based source-transaction level SW/HW co-debugging. APCCAS Tsun-Hsin Chang, Shao-Chieh Hou, Ing-Jer Huang
2016	—	`conf`	Full system verification of compatible microprocessors with a dual physical core verification platform. ISOCC Jyun-Yan Li, Ing-Jer Huang
2015	—	`conf`	An OpenGL ES 2.0 3D graphics SoC with versatile HW/SW development support. VLSI-DAT Hsu-Kang Dow, Ching-Hua Huang, Chun-Hung Lai, Kai-Hsiang Tsao, Sheng-Chih Tseng, Kun-Yi Wu, Ting-Hsuan Wu, Ho-Chun Yang, Da-Jing Zhang-Jian, Yun-Nan Chang, Steve Haga, Shen-Fu Hsiao, Ing-Jer Huang, Shiann-Rong Kuang, Chung-Nan Lee
2014	J	`jnl`	A Versatile Data Cache for Trace Buffer Support. IEEE Trans. Circuits Syst. I Regul. Pap. Chun-Hung Lai, Yun-Chung Yang, Ing-Jer Huang
2014	—	`conf`	Reconfigurable Bus Monitor Tool Suite for on-chip SoC for performance and protocol monitoring. ReCoSoC Ping-Chun Lee, Ing-Jer Huang
2013	—	`conf`	A versatile data cache for trace buffer support. VLSI-DAT Chun-Hung Lai, Yun-Chung Yang, Ing-Jer Huang
2012	—	`conf`	A performance monitoring tool suite for 3D graphics SoC application. APCCAS Yi-Hao Chang, Chi-Tsai Yeh, Ing-Jer Huang, Shau-Yin Tseng
2012	—	`conf`	An OCP-AHB bus wrapper with built-in ICE support for SOC integration. VLSI-DAT Cheng-Ta Wu, Feng-Xiang Huang, Kuan-Fu Kuo, Ing-Jer Huang
2011	J	`jnl`	A Real-Time Power Analysis Platform for Power-Aware Embedded System Development. J. Inf. Sci. Eng. Liang-Bi Chen, Yen-Ling Chen, Ing-Jer Huang
2011	J	`jnl`	A Trace-Capable Instruction Cache for Cost-Efficient Real-Time Program Trace Compression in SoC. IEEE Trans. Computers Chun-Hung Lai, Fu-Ching Yang, Ing-Jer Huang
2011	J	`jnl`	An On-Chip AHB Bus Tracer With Real-Time Compression and Dynamic Multiresolution Supports for SoC. IEEE Trans. Very Large Scale Integr. Syst. Fu-Ching Yang, Yi-Ting Lin, Chung-Fu Kao, Ing-Jer Huang
2011	J	`jnl`	Internet-based hardware/software co-design framework for embedded 3D graphics applications. EURASIP J. Adv. Signal Process. Chi-Tsai Yeh, Chun-Hao Wang, Ing-Jer Huang, Weng-Fai Wong
2010	J	`jnl`	A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization. IEEE Trans. Very Large Scale Integr. Syst. Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
2010	—	`conf`	An embedded debugging/performance monitoring engine for a tile-based 3D graphics SoC development. ASP-DAC Liang-Bi Chen, Tsung-Yu Ho, Jiun-Cheng Ju, Cheng-Lung Chiang, Chung-Nan Lee, Ing-Jer Huang
2010	J	`jnl`	HPChecker: An AMBA AHB On-Chip Bus Protocol Checker with Efficient Verification Mechanisms. IEICE Trans. Inf. Syst. Liang-Bi Chen, Jiun-Cheng Ju, Chien-Chou Wang, Ing-Jer Huang
2009	C	`conf`	A Reverse-encoding-based On-chip AHB Bus Tracer Supporting both Post-T and Pre-T Trace. ISCAS Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
2009	J	`jnl`	A System-Level Model of Design Space Exploration for a Tile-Based 3D Graphics SoC Refinement. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Liang-Bi Chen, Chi-Tsai Yeh, Hung-Yu Chen, Ing-Jer Huang
2009	—	`conf`	A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization. ASP-DAC Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
2009	A*	`conf`	A trace-capable instruction cache for cost efficient real-time program trace compression in SoC. DAC Chun-Hung Lai, Fu-Ching Yang, Chung-Fu Kao, Ing-Jer Huang
2009	—	`conf`	An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. ASP-DAC Liang-Bi Chen, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang
2008	A*	`conf`	A multi-resolution AHB bus tracer for real-time compression of forward/backward traces in a circular buffer. DAC Yi-Ting Lin, Wen-Chi Shiue, Ing-Jer Huang
2008	C	`conf`	AMBA AHB bus potocol checker with efficient debugging mechanism. ISCAS Yi-Ting Lin, Chien-Chou Wang, Ing-Jer Huang
2008	J	`jnl`	Automatic Verification of External Interrupt Behaviors for Microprocessor Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fu-Ching Yang, Wen-Kai Huang, Jing-Kun Zhong, Ing-Jer Huang
2008	J	`jnl`	Hardware-Software Approaches to In-Circuit Emulation for Embedded Processors. IEEE Des. Test Comput. Chung-Fu Kao, Hsin-Ming Chen, Ing-Jer Huang
2008	—	`conf`	NCPA: A Scheduling Algorithm for Multi-cipher and Multi-mode Reconfigurable Cryptosystem. IIH-MSP Chung-Ping Young, Chung-Chu Chia, Liang-Bi Chen, Ing-Jer Huang
2008	—	`conf`	On-Chip-Network cryptosystem: A high throughput and high security architecture. APCCAS Chung-Ping Young, Chung-Chu Chia, Liang-Bi Chen, Ing-Jer Huang
2008	—	`conf`	Parameterized embedded in-circuit emulator and its retargetable debugging software for microprocessor/microcontroller/DSP processor. ASP-DAC Liang-Bi Chen, Yung-Chih Liu, Chen-Hung Chen, Chung-Fu Kao, Ing-Jer Huang
2008	A	`conf`	Verifying external interrupts of embedded microprocessor in SoC with on-chip bus. ICCAD Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang
2007	J	`jnl`	A Hardware Approach to Real-Time Program Trace Compression for Embedded Processors. IEEE Trans. Circuits Syst. I Regul. Pap. Chung-Fu Kao, Shyh-Ming Huang, Ing-Jer Huang
2007	—	`conf`	An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools. ASP-DAC Fu-Ching Yang, Ing-Jer Huang
2007	A*	`conf`	An Embedded Multi-resolution AMBA Trace Analyzer for Microprocessor-based SoC Integration. DAC Chung-Fu Kao, Ing-Jer Huang, Chi-Hung Lin
2007	A*	`conf`	Automatic Verification of External Interrupt Behaviors for Microprocessor Design. DAC Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang
2007	—	`conf`	Configurable AMBA On-Chip Real-Time Signal Tracer. ASP-DAC Chung-Fu Kao, Chi-Hung Lin, Ing-Jer Huang
2007	C	`conf`	SystemC-Based Design Space Exploration of a 3D Graphics Acceleration SoC for Consumer Electronics. EUC Tse-Chen Yeh, Tsung-Yu Ho, Hung-Yu Chen, Ing-Jer Huang
2007	—	`conf`	The AES Design Space Exploration with a Soft IP Generator. IIH-MSP Liang-Bi Chen, Ching-Chi Hu, Yen-Ling Chen, Chi-Wei Chu, Ing-Jer Huang
2006	—	`conf`	Design of a Dynamic PCM Selector for Non-deterministic Environment. APCCAS Liang-Bi Chen, Ing-Jer Huang, Yuan-Long Jeang
2005	—	`conf`	A cost-effective media processor for embedded applications [audio decoder example]. ISCAS (6) Wen-Kai Huang, I-Ting Lin, Shi-Wei Chen, Ing-Jer Huang
2003	J	`jnl`	Automatic Assembly Program Retargeting for Micrco controllers. J. Inf. Sci. Eng. Ing-Jer Huang, Dao-Zhen Chen
2003	J	`jnl`	Mining Correlations of Human Gene Expression from Digital Gene Expression Profiles. J. Inf. Sci. Eng. Ing-Jer Huang, Dao-Zhen Chen
2003	—	`conf`	Reconfigurable real-time address trace compressor for embedded microprocessors. FPT Shyh-Ming Huang, Ing-Jer Huang, Chung-Fu Kao
2002	J	`jnl`	A Retargetable Embedded In-Circuit Emulation Module for Microprocessors. IEEE Des. Test Comput. Ing-Jer Huang, Chung-Fu Kao, Hsin-Ming Chen, Ching-Nan Juan, Tai-An Lu
2002	J	`jnl`	Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors. IEEE Trans. Very Large Scale Integr. Syst. Ing-Jer Huang, Ping-Huei Xie
2002	J	`jnl`	Design Exploration of an Industrial Embedded Microcontroller: Performance, Cost and Software Compatibility. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Ing-Jer Huang, Li-Rong Wang, Yu-Min Wang, Tai-An Lu
2001	J	`jnl`	Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors. ACM Trans. Design Autom. Electr. Syst. Ing-Jer Huang
2001	—	`conf`	Parameterized MAC unit implementation. ASP-DAC Ming-Chih Chen, Ing-Jer Huang, Chung-Ho Chen
2001	—	`conf`	Reusable embedded in-circuit emulator. ASP-DAC Ing-Jer Huang, Hsin-Ming Chen, Chung-Fu Kao
2000	J	`jnl`	A Machine State Transition Approach to Instruction Retargeting for Embedded Microprocessors. Des. Autom. Embed. Syst. Ing-Jer Huang, Wen-Fu Kao
2000	—	`conf`	A new approach to assembly software retargeting for microcontrollers. ASP-DAC Ing-Jer Huang, Dao-Zhen Chen
1999	J	`jnl`	Automatic Simulation and Verification of Pipelined Microcontrollers. J. Inf. Sci. Eng. Ing-Jer Huang, Li-Rong Wang
1999	A*	`conf`	ICEBERG: An Embedded In-Circuit Emulator Synthesizer for Microcontrollers. DAC Ing-Jer Huang, Tai-An Lu
1998	J	`jnl`	A Case Study: Synthesis and Exploration of Instruction Set Design for Application-Specific Symbolic Computing. J. Inf. Sci. Eng. Ing-Jer Huang
1998	C	`conf`	Analysis of ×86 instruction set usage for DOS/Windows applications and its implication on superscalar design. ICCD Ing-Jer Huang, Tzu-Chin Peng
1998	—	`conf`	Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation. ISSS Ing-Jer Huang, Ping-Huei Xie
1997	—	`conf`	Synthesis and analysis of an industrial embedded microcontroller. ASP-DAC Ing-Jer Huang, Li-Rong Wang, Yu-Min Wang
1995	J	`jnl`	Synthesis of application specific instruction sets. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ing-Jer Huang, Alvin M. Despain
1994	A	`conf`	Generating instruction sets and microarchitectures from applications. ICCAD Ing-Jer Huang, Alvin M. Despain
1994	A*	`conf`	Synthesis of Instruction Sets for Pipelined Microprocessors. DAC Ing-Jer Huang, Alvin M. Despain
1993	A*	`conf`	An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors. MICRO Ing-Jer Huang, Alvin M. Despain
1993	A	`conf`	Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors. ICCAD Ing-Jer Huang, Alvin M. Despain
1992	A*	`conf`	Application-Driven Design Automation for Microprocessor Design. DAC Iksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain
1992	A*	`conf`	High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers. DAC Ing-Jer Huang, Alvin M. Despain