Ing-Chao Lin - RankMe

65 papers A* 1A 13B 1C 1Misc 1Journal 34Unranked 14

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	TT-RRAM: Joint Improvement of Sparsity and Repetition in Tensor-Train Inference With Fused Processing on RRAM Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fang-Yi Gu, Pin-Hong Liu, Ing-Chao Lin, Bo Yuan
2025	—	`conf`	A Lifetime Extension Framework for Communication-Intensive Systems Based on Wavelength-Routed Optical Networks-on-Chip. ACM Great Lakes Symposium on VLSI Zhidan Zheng, Liaoyuan Cheng, Jeng-De Chang, Tsun-Ming Tseng, Ing-Chao Lin, Ulf Schlichtmann
2025	A*	`conf`	Basis Sharing: Cross-Layer Parameter Sharing for Large Language Model Compression. ICLR Jingcun Wang, Yu-Guang Chen, Ing-Chao Lin, Bing Li, Grace Li Zhang
2025	J	`jnl`	Efficient Model Switching in RRAM-Based DNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fang-Yi Gu, Ing-Chao Lin, Bing Li, Ulf Schlichtmann, Grace Li Zhang
2025	—	`conf`	Optimizing Reliability and Energy Efficiency in Heterogeneous Multicore Systems: A Novel Task Deployment Strategy. ACM Great Lakes Symposium on VLSI Yu-Guang Chen, Yin-Rong Zhuo, Zheng-Wei Chen, Ing-Chao Lin
2025	—	`conf`	ReAD: ReRAM-Based Computing-In-Memory Design and Optimization by AC-DC Mixed Signal. SOCC Guanyu Chi, Ing-Chao Lin
2025	A	`conf`	SegTransformer: Enhancing Softmax Performance Through Segmentation with a ReRAM-Based PIM Accelerator. DATE Yu Chen Wang, Ing-Chao Lin, Yuan-Hao Chang
2025	—	`conf`	VRank: Enhancing Verilog Code Generation from Large Language Models via Self-Consistency. ISQED Zhuorui Zhao, Ruidi Qiu, Ing-Chao Lin, Grace Li Zhang, Bing Li, Ulf Schlichtmann
2025	J	`jnl`	VRank: Enhancing Verilog Code Generation from Large Language Models via Self-Consistency. CoRR Zhuorui Zhao, Ruidi Qiu, Ing-Chao Lin, Grace Li Zhang, Bing Li, Ulf Schlichtmann
2025	A	`conf`	WROXIM: A Network-Level Simulation Platform for Wavelength-Routed Optical Networks-on-Chip. ICCAD Jeng-De Chang, Zhidan Zheng, Liaoyuan Cheng, Liu-Xuan-Wei Zhang, Tsun-Ming Tseng, Ing-Chao Lin, Ulf Schlichtmann
2024	J	`jnl`	A Hardware Friendly Variation-Tolerant Framework for RRAM-Based Neuromorphic Computing. IEEE Trans. Circuits Syst. I Regul. Pap. Fang-Yi Gu, Cheng-Han Yang, Ing-Chao Lin, Da-Wei Chang, Darsen D. Lu, Ulf Schlichtmann
2024	J	`jnl`	Aging-Aware Energy-Efficient Task Deployment of Heterogeneous Multicore Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yu-Guang Chen, Chieh-Shih Wang, Ing-Chao Lin, Zheng-Wei Chen, Ulf Schlichtmann
2024	—	`conf`	An Efficient Sparse CNN Architecture with Index-based Kernel Transformation. APCCAS Po-Ting Chen, Shan-Chi Yu, Ing-Chao Lin
2024	J	`jnl`	AttentionRC: A Novel Approach to Improve Locality Sensitive Hashing Attention on Dual-Addressing Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Chun-Lin Chu, Yun-Chih Chen, Wei Cheng, Ing-Chao Lin, Yuan-Hao Chang
2024	J	`jnl`	Basis Sharing: Cross-Layer Parameter Sharing for Large Language Model Compression. CoRR Jingcun Wang, Yu-Guang Chen, Ing-Chao Lin, Bing Li, Grace Li Zhang
2024	A	`conf`	BasisN: Reprogramming-Free RRAM-Based In-Memory-Computing by Basis Combination for Deep Neural Networks. ICCAD Amro Eldebiky, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ing-Chao Lin, Ulf Schlichtmann, Bing Li
2024	J	`jnl`	BasisN: Reprogramming-Free RRAM-Based In-Memory-Computing by Basis Combination for Deep Neural Networks. CoRR Amro Eldebiky, Grace Li Zhang, Xunzhao Yin, Cheng Zhuo, Ing-Chao Lin, Ulf Schlichtmann, Bing Li
2024	A	`conf`	Class-Aware Pruning for Efficient Neural Networks. DATE Mengnan Jiang, Jingcun Wang, Amro Eldebiky, Xunzhao Yin, Cheng Zhuo, Ing-Chao Lin, Grace Li Zhang
2024	B	`conf`	GNN-Based INC and IVC Co-Optimization for Aging Mitigation. ETS Yu-Guang Chen, Hsiu-Yi Yang, Ing-Chao Lin
2023	A	`conf`	A Novel and Efficient Block-Based Programming for ReRAM-Based Neuromorphic Computing. ICCAD Wei-Lun Chen, Fang-Yi Gu, Ing-Chao Lin, Grace Li Zhang, Bing Li, Ulf Schlichtmann
2023	J	`jnl`	CIMulator: A Comprehensive Simulation Platform for Computing-In-Memory Circuit Macros with Low Bit-Width and Real Memory Materials. CoRR Hoang-Hiep Le, Md. Aftab Baig, Wei-Chen Hong, Cheng-Hsien Tsai, Cheng-Jui Yeh, Fu-Xiang Liang, I-Ting Huang, Wei-Tzu Tsai, Ting-Yin Cheng, Sourav De, Nan-Yow Chen, Wen-Jay Lee, Ing-Chao Lin, Da-Wei Chang, Darsen D. Lu
2023	J	`jnl`	Class-Aware Pruning for Efficient Neural Networks. CoRR Mengnan Jiang, Jingcun Wang, Amro Eldebiky, Xunzhao Yin, Cheng Zhuo, Ing-Chao Lin, Grace Li Zhang
2022	J	`jnl`	A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation. IEEE Access Fang-Yi Gu, Ing-Chao Lin, Jia-Wei Lin
2022	—	`conf`	An Aging Detection and Tolerance Framework for 8T SRAM Dot Product CIM Engine. ISOCC Yu-Guang Chen, Chi-Hsu Wang, Ing-Chao Lin
2022	J	`jnl`	An Efficient Implementation of Convolutional Neural Network With CLIP-Q Quantization on FPGA. IEEE Trans. Circuits Syst. I Regul. Pap. Wei Cheng, Ing-Chao Lin, Yun-Yang Shih
2022	A	`conf`	GraphRC: Accelerating Graph Processing on Dual-Addressing Memory with Vertex Merging. ICCAD Wei Cheng, Chun-Feng Wu, Yuan-Hao Chang, Ing-Chao Lin
2022	A	`conf`	WRAP: Weight RemApping and Processing in RRAM-based Neural Network Accelerators Considering Thermal Effect. DATE Po-Yuan Chen, Fang-Yi Gu, Yu-Hong Huang, Ing-Chao Lin
2021	—	`conf`	A Novel NBTI-Aware Chip Remaining Lifetime Prediction Framework Using Machine Learning. ISQED Yu-Guang Chen, Ing-Chao Lin, Yong-Che Wei
2021	J	`jnl`	A Novel, Efficient Implementation of a Local Binary Convolutional Neural Network. IEEE Trans. Circuits Syst. II Express Briefs Ing-Chao Lin, Chi-Huan Tang, Chi-Ting Ni, Xing Hu, Yu-Tong Shen, Pei-Yin Chen, Yuan Xie
2021	J	`jnl`	An efficient Integr. Yu-Guang Chen, Ing-Chao Lin, Kun-Wei Chiu, Cheng-Hsuan Liu
2021	J	`jnl`	Exploring Adversarial Examples for Efficient Active Learning in Machine Learning Classifiers. CoRR Honggang Yu, Shihfeng Zeng, Teng Zhang, Ing-Chao Lin, Yier Jin
2021	J	`jnl`	Rescuing RRAM-Based Computing From Static and Dynamic Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jilan Lin, Cheng-Da Wen, Xing Hu, Tianqi Tang, Ing-Chao Lin, Yu Wang, Yuan Xie
2020	J	`jnl`	A Novel Comparison-Free 1-D Median Filter. IEEE Trans. Circuits Syst. II Express Briefs Ing-Chao Lin, Wei-Ting Chen, Yu-Cheng Chou, Pei-Yin Chen
2020	—	`conf`	An NBTI-aware Task Parallelism Scheme for Improving Lifespan of Multi-core Systems. ISQED Yu-Guang Chen, Yu-Yi Lin, Ing-Chao Lin
2020	J	`jnl`	Global Clean Page First Replacement and Index-Aware Multistream Prefetcher in Hybrid Memory Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ing-Chao Lin, Da-Wei Chang, Wei-Jun Chen, Jian-Ting Ke, Po-Han Huang
2020	A	`conf`	Overview of 2020 CAD Contest at ICCAD. ICCAD Ing-Chao Lin, Ulf Schlichtmann, Tsung-Wei Huang, Mark Po-Hung Lin
2019	J	`jnl`	Infection-Based Dead Page Prediction in Hybrid Memory Architecture. IEEE Trans. Very Large Scale Integr. Syst. Ing-Chao Lin, Da-Wei Chang, Chen-Tai Kao, Sheng-Xuan Lin
2019	J	`jnl`	OCMAS: Online Page Clustering for Multibank Scratchpad Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Da-Wei Chang, Ing-Chao Lin, Yi-Chiao Lin, Wen-Zhi Huang
2019	A	`conf`	Overview of 2019 CAD Contest at ICCAD. ICCAD Ulf Schlichtmann, Sabya Das, Ing-Chao Lin, Mark Po-Hung Lin
2019	A	`conf`	ROAD: Improving Reliability of Multi-core System via Asymmetric Aging. ICCAD Yu-Guang Chen, Ing-Chao Lin, Jian-Ting Ke
2019	J	`jnl`	TAP: Reducing the Energy of Asymmetric Hybrid Last-Level Cache via Thrashing Aware Placement and Migration. IEEE Trans. Computers Jing-Yuan Luo, Hsiang-Yun Cheng, Ing-Chao Lin, Da-Wei Chang
2018	A	`conf`	An efficient NBTI-aware wake-up strategy for power-gated designs. DATE Kun-Wei Chiu, Yu-Guang Chen, Ing-Chao Lin
2018	J	`jnl`	Mitigating BTI-Induced Degradation in STT-MRAM Sensing Schemes. IEEE Trans. Very Large Scale Integr. Syst. Ing-Chao Lin, Yun Kae Law, Yuan Xie
2017	J	`jnl`	ROHOM: Requirement-Aware Online Hybrid On-Chip Memory Management for Multicore Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Da-Wei Chang, Ing-Chao Lin, Lin-Chun Yong
2017	—	`conf`	Reducing aging on scratchpad memory using temporal- and FSM-based power management. VLSI-DAT Yun Kae Law, Ing-Chao Lin, Cheng-Chien Lin
2016	J	`jnl`	Reducing Aging Effects on Ternary CAM. IEICE Trans. Electron. Ing-Chao Lin, Yen-Han Lee, Sheng-Wei Wang
2015	J	`jnl`	Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic. IEEE Trans. Very Large Scale Integr. Syst. Ing-Chao Lin, Yu-Hung Cho, Yi-Ming Yang
2015	J	`jnl`	High-Endurance Hybrid Cache Design in CMP Architecture With Cache Partitioning and Access-Aware Policies. IEEE Trans. Very Large Scale Integr. Syst. Ing-Chao Lin, Jeng-Nian Chiou
2015	J	`jnl`	High-Performance Low-Power Carry Speculative Addition With Variable Latency. IEEE Trans. Very Large Scale Integr. Syst. Ing-Chao Lin, Yi-Ming Yang, Cheng-Chian Lin
2014	A	`conf`	Analyzing the BTI Effect on Multi-bit Retention Registers. ICS Ing-Chao Lin, Yao-Te Wang, Shuen-Shiang Yang, Yi-Luen Wu
2014	J	`jnl`	BTI-Aware Sleep Transistor Sizing Algorithm for Reliable Power Gating Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kai-Chiang Wu, Ing-Chao Lin, Yao-Te Wang, Shuen-Shiang Yang
2014	J	`jnl`	CASA: Contention-Aware Scratchpad Memory Allocation for Online Hybrid On-Chip Memory Management. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Da-Wei Chang, Ing-Chao Lin, Yu-Shiang Chien, Ching-Lun Lin, Alvin W. Y. Su, Chung-Ping Young
2014	J	`jnl`	Capture-Power-Safe Test Pattern Determination for At-Speed Scan-Based Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yi-Hua Li, Wei-Cheng Lien, Ing-Chao Lin, Kuen-Jong Lee
2014	J	`jnl`	NBTI and Leakage Reduction Using ILP-Based Approach. IEEE Trans. Very Large Scale Integr. Syst. Ing-Chao Lin, Kuan-Hui Li, Chia-Hao Lin, Kai-Chiang Wu
2014	J	`jnl`	NBTI tolerance and leakage reduction using gate sizing. ACM J. Emerg. Technol. Comput. Syst. Ing-Chao Lin, Shun-Ming Syu, Tsung-Yi Ho
2013	C	`conf`	High accuracy approximate multiplier with error correction. ICCD Chia-Hao Lin, Ing-Chao Lin
2013	—	`conf`	High-endurance hybrid cache design in CMP architecture with cache partitioning and access-aware policy. ACM Great Lakes Symposium on VLSI Shun-Ming Syu, Yu-Hui Shao, Ing-Chao Lin
2013	—	`conf`	Impacts of NBTI and PBTI effects on ternary CAM. ISQED Yen-Han Lee, Ing-Chao Lin, Sheng-Wei Wang
2013	J	`jnl`	Leakage and Aging Optimization Using Transmission Gate-Based Technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ing-Chao Lin, Chin-Hung Lin, Kuan-Hui Li
2012	—	`conf`	Aging-aware reliable multiplier design. SoCC Yu-Hung Cho, Ing-Chao Lin, Yi-Ming Yang
2011	—	`conf`	Analyzing throughput of power and thermal-constraint multicore processor under NBTI effect. ACM Great Lakes Symposium on VLSI Shi-Qun Zheng, Ing-Chao Lin, Yen-Han Lee
2011	A	`conf`	TG-based technique for NBTI degradation and leakage optimization. ISLPED Chin-Hung Lin, Ing-Chao Lin, Kuan-Hui Li
2006	—	`conf`	Transaction Level Error Susceptibility Model for Bus Based SoC Architectures. ISQED Ing-Chao Lin, Suresh Srinivasan, Narayanan Vijaykrishnan, Nagu R. Dhanwada
2005	Misc	`conf`	A power estimation methodology for systemC transaction level models. CODES+ISSS Nagu R. Dhanwada, Ing-Chao Lin, Vijaykrishnan Narayanan
2005	J	`jnl`	Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems. Des. Autom. Embed. Syst. Nagu R. Dhanwada, Reinaldo A. Bergamaschi, William W. Dungan, Indira Nair, Paul Gramann, William E. Dougherty, Ing-Chao Lin