Ilya Issenin

18 papers A* 1A 3B 1Misc 4Journal 7Unranked 2
YearRankTypeTitle / Venue / Authors
2009 J jnl
Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil D. Dutt, Minwook Ahn, Yunheung Paek
2009 J jnl
Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt, Sanghyun Park, Yunheung Paek
2009 J jnl
Partially Protected Caches to Reduce Failures Due to Soft Errors in Multimedia Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt, Nalini Venkatasubramanian
2008 — conf
A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures.
ASP-DAC
Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt
2008 B conf
Compiler driven data layout optimization for regular/irregular array access patterns.
LCTES
Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil D. Dutt, Yunheung Paek, SunJun Ko
2008 J jnl
Data-Reuse-Driven Energy-Aware Cosynthesis of Scratch Pad Memory and Hierarchical Bus-Based Communication Architecture for Multiprocessor Streaming Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil D. Dutt
2008 J jnl
Using FORAY Models to Enable MPSoC Memory Optimizations.
Int. J. Parallel Program.
Ilya Issenin, Nikil D. Dutt
2007 J jnl
DRDU: A data reuse analysis technique for efficient scratch-pad memory management.
ACM Trans. Design Autom. Electr. Syst.
Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil D. Dutt
2007 — conf
Data Reuse Driven Memory and Network-On-Chip Co-Synthesis.
IESS
Ilya Issenin, Nikil D. Dutt
2007 J jnl
FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations
CoRR
Ilya Issenin, Nikil D. Dutt
2007 Misc conf
Software controlled memory layout reorganization for irregular array access patterns.
CASES
Doosan Cho, Ilya Issenin, Nikil D. Dutt, Jonghee W. Yoon, Yunheung Paek
2006 Misc conf
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications.
CODES+ISSS
Ilya Issenin, Nikil D. Dutt
2006 Misc conf
Mitigating soft error failures for multimedia applications by selective data protection.
CASES
Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt, Nalini Venkatasubramanian
2006 A* conf
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies.
DAC
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil D. Dutt
2005 Misc conf
Compilation techniques for energy reduction in horizontally partitioned cache architectures.
CASES
Aviral Shrivastava, Ilya Issenin, Nikil D. Dutt
2005 A conf
FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations.
DATE
Ilya Issenin, Nikil D. Dutt
2004 A conf
Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies.
DATE
Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nikil D. Dutt
2002 A conf
Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints.
DATE
Ana Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil D. Dutt, Alexander V. Veidenbaum, Alexandru Nicolau