Ilias Chlis

11 papers Journal 8Unranked 3
YearRankTypeTitle / Venue / Authors
2021 J jnl
A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET.
IEEE J. Solid State Circuits
Jay Im, Kevin Zheng, Chuen-Huei Adam Chou, Lei Zhou, Jae Wook Kim, Stanley Chen, Yipeng Wang, Hao-Wei Hung, Kee Hian Tan, Winson Lin, Arianne Roldan, Declan Carey, Ilias Chlis, Ronan Casey, Ade Bekele, Ying Cao, David Mahashin, Hong Ahn, Hongtao Zhang, Yohan Frans, Ken Chang
2020 — conf
6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET.
ISSCC
Jay Im, Kevin Zheng, Adam Chou, Lei Zhou, Jae Wook Kim, Stanley Chen, Yipeng Wang, Hao-Wei Hung, Kee Hian Tan, Winson Lin, Arianne Roldan, Declan Carey, Ilias Chlis, Ronan Casey, Ade Bekele, Ying Cao, David Mahashin, Hong Ahn, Hongtao Zhang, Yohan Frans, Ken Chang
2018 — conf
A 112GB/S PAM4 Wireline Receiver Using a 64-Way Time-Interleaved SAR ADC in 16NM FinFET.
VLSI Circuits
James Hudner, Declan Carey, Ronan Casey, Kay Hearne, Pedro Wilson de Abreu Farias Neto, Ilias Chlis, Marc Erett, Chi Fung Poon, Asma Laraba, Hongtao Zhang, Sai Lalith Chaitanya Ambatipudi, David Mahashin, Parag Upadhyaya, Yohan Frans, Ken Chang
2018 J jnl
Transformer-Based Input Integrated Matching in Cascode Amplifiers: Analytical Proofs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Domenico Pepe, Ilias Chlis, Domenico Zito
2017 J jnl
Analyses and techniques for phase noise reduction in CMOS Hartley oscillator topology.
Int. J. Circuit Theory Appl.
Ilias Chlis, Domenico Pepe, Domenico Zito
2017 J jnl
Transformer-coupled π-network differential CMOS oscillator circuit topology.
Int. J. Circuit Theory Appl.
Ilias Chlis, Domenico Pepe, Domenico Zito
2016 J jnl
67 GHz three-spiral transformer CMOS oscillator.
Int. J. Circuit Theory Appl.
Domenico Pepe, Ilias Chlis, Domenico Zito
2016 J jnl
Analyses and techniques for phase noise reduction in CMOS Colpitts oscillator topology.
Int. J. Circuit Theory Appl.
Ilias Chlis, Domenico Pepe, Domenico Zito
2016 J jnl
Phase noise analysis in CMOS differential Armstrong oscillator topology.
Int. J. Circuit Theory Appl.
Ilias Chlis, Domenico Pepe, Domenico Zito
2015 J jnl
Analysis of Phase Noise in 28 nm CMOS LC Oscillator Differential Topologies: Armstrong, Colpitts, Hartley and Common-Source Cross-Coupled Pair.
J. Circuits Syst. Comput.
Ilias Chlis, Domenico Pepe, Domenico Zito
2012 — conf
Ultra-low voltage drain-bulk connected MOS transistors in weak and moderate inversion.
ICECS
Athanasios Dimakos, Matthias Bucher, Rupendra Kumar Sharma, Ilias Chlis