Igor Arsovski

13 papers A 1Journal 5Unranked 7
YearRankTypeTitle / Venue / Authors
2018 J jnl
1.4Gsearch/s 2-Mb/mm
IEEE J. Solid State Circuits
Igor Arsovski, Akhilesh Patil, Robert M. Houle, Michael Fragano, Ramon Rodriguez, Raymond Kim, Van Butler
2017 — conf
12.4 1.4Gsearch/s 2Mb/mm
ISSCC
Igor Arsovski, Michael Fragano, Robert M. Houle, Akhilesh Patil, Van Butler, Raymond Kim, Ramon Rodriguez, Tom Maffitt, Joseph J. Oler, John Goss, Christopher Parkinson, Michael A. Ziegerhofer, Steven Burns
2013 J jnl
A 32 nm 0.58-fJ/Bit/Search 1-GHz Ternary Content Addressable Memory Compiler Using Silicon-Aware Early-Predict Late-Correct Sensing With Embedded Deep-Trench Capacitor Noise Mitigation.
IEEE J. Solid State Circuits
Igor Arsovski, Travis Hebig, Daniel Dobson, Reid Wistort
2013 — conf
A 64Mb SRAM in 22nm SOI technology featuring fine-granularity power gating and low-energy power-supply-partition techniques for 37% leakage reduction.
ISSCC
Harold Pilo, Chad A. Adams, Igor Arsovski, Robert M. Houle, Steve Lamphier, Michael M. Lee, Frank Pavlik, Sushma N. Sambatur, Adnan Seferagic, Richard Wu, Mohammad Imran Younus
2013 — conf
Tail-Bit Tracking circuit with degraded VGS bit-cell mimic array for a 50% search-time and 200mV Vmin improvement in a Ternary Content Addressable Memory.
CICC
Igor Arsovski, Travis Hebig, John Goss, Paul Grzymkowski, Josh Patch
2012 — conf
1Gsearch/sec Ternary Content Addressable Memory compiler with silicon-aware Early-Predict Late-Correct single-ended sensing.
VLSIC
Igor Arsovski, Travis Hebig, Daniel Dobson, Reid Wistort
2012 J jnl
A 64 Mb SRAM in 32 nm High-k Metal-Gate SOI Technology With 0.7 V Operation Enabled by Stability, Write-Ability and Read-Ability Enhancements.
IEEE J. Solid State Circuits
Harold Pilo, Igor Arsovski, Kevin Batson, Geordie Braceras, John A. Gabric, Robert M. Houle, Steve Lamphier, Carl Radens, Adnan Seferagic
2011 — conf
A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements.
ISSCC
Harold Pilo, Igor Arsovski, Kevin Batson, Geordie Braceras, John A. Gabric, Robert M. Houle, Steve Lamphier, Frank Pavlik, Adnan Seferagic, Liang-Yu Chen, Shang-Bin Ko, Carl Radens
2006 A conf
Improved Match-Line Test and Repair Methodology Including Power-Supply Noise Testing for Content-Addressable Memories.
ITC
Rahul Nadkarni, Igor Arsovski, Reid Wistort, Valerie Chickanosky
2006 — conf
Self-referenced sense amplifier for across-chip-variation immune sensing in high-performance Content-Addressable Memories.
CICC
Igor Arsovski, Reid Wistort
2005 — conf
Low-noise embedded CAM with reduced slew-rate match-lines and asynchronous search-lines.
CICC
Igor Arsovski, Rahul Nadkarni
2003 J jnl
A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories.
IEEE J. Solid State Circuits
Igor Arsovski, Ali Sheikholeslami
2003 J jnl
A ternary content-addressable memory (TCAM) based on 4T static storage and including a current-race sensing scheme.
IEEE J. Solid State Circuits
Igor Arsovski, Trevis Chandler, Ali Sheikholeslami