Ignatius Bezzam

16 papers C 5Misc 1Journal 8Unranked 2

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	ArXrCiM: Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory. IEEE Trans. Very Large Scale Integr. Syst. Dhandeep Challagundla, Ignatius Bezzam, Riadul Islam
2025	C	`conf`	TSPC-Based Low-Power High-Resolution CMOS Phase Frequency Detector. VLSI-SoC Dhandeep Challagundla, Venkata Krishna Vamsi Sundarapu, Ignatius Bezzam, Riadul Islam
2025	J	`jnl`	TSPC-PFD: TSPC-Based Low-Power High-Resolution CMOS Phase Frequency Detector. CoRR Dhandeep Challagundla, Venkata Krishna Vamsi Sundarapu, Ignatius Bezzam, Riadul Islam
2024	—	`conf`	A Resonant Time-Domain Compute-in-Memory (rTD-CiM) ADC-Less Architecture for MAC Operations. ACM Great Lakes Symposium on VLSI Dhandeep Challagundla, Ignatius Bezzam, Riadul Islam
2024	J	`jnl`	Architectural Exploration of Application-Specific Resonant SRAM Compute-in-Memory (rCiM). CoRR Dhandeep Challagundla, Ignatius Bezzam, Riadul Islam
2023	J	`jnl`	Design Automation of Series Resonance Clocking in 14-nm FinFETs. Circuits Syst. Signal Process. Dhandeep Challagundla, Ignatius Bezzam, Riadul Islam
2023	C	`conf`	Resonant Compute-In-Memory (rCIM) 10T SRAM Macro for Boolean Logic. ICCD Dhandeep Challagundla, Ignatius Bezzam, Biprangshu Saha, Riadul Islam
2022	C	`conf`	Power and Skew Reduction Using Resonant Energy Recycling in 14-nm FinFET Clocks. ISCAS Dhandeep Challagundla, Mehedi Galib, Ignatius Bezzam, Riadul Islam
2022	J	`jnl`	Power and Skew Reduction Using Resonant Energy Recycling in 14-nm FinFET Clocks. CoRR Dhandeep Challagundla, Mehedi Galib, Ignatius Bezzam, Riadul Islam
2021	J	`jnl`	Resonant Energy Recycling SRAM Architecture. IEEE Trans. Circuits Syst. II Express Briefs Riadul Islam, Biprangshu Saha, Ignatius Bezzam
2020	J	`jnl`	Resonant Energy Recycling SRAM Architecture. CoRR Riadul Islam, Biprangshu Saha, Ignatius Bezzam
2015	J	`jnl`	An Energy-Recovering Reconfigurable Series Resonant Clocking Scheme for Wide Frequency Operation. IEEE Trans. Circuits Syst. I Regul. Pap. Ignatius Bezzam, Chakravarthy Mathiazhagan, Tezaswi Raja, Shoba Krishnan
2014	C	`conf`	A pulsed resonance clocking for energy recovery. ISCAS Ignatius Bezzam, Shoba Krishnan
2014	Misc	`conf`	Minimizing Power and Skew in VLSI-SoC Clocking with Pulsed Resonance Driven De-skewing Latches. VLSID Ignatius Bezzam, Shoba Krishnan
2013	—	`conf`	Low power low voltage wide frequency resonant clock and data circuits for power reductions. LASCAS Ignatius Bezzam, Shoba Krishnan, Tezaswi Raja, Chakravarthy Mathiazhagan
2012	C	`conf`	Low power SoCs with resonant dynamic logic using inductors for energy recovery. VLSI-SoC Ignatius Bezzam, Shoba Krishnan, Chakravarthy Mathiazhagan