Ian Kuon

12 papers A* 1A 6Misc 1Journal 4
YearRankTypeTitle / Venue / Authors
2011 J jnl
Exploring Area and Delay Tradeoffs in FPGAs With Architecture and Automated Transistor Design.
IEEE Trans. Very Large Scale Integr. Syst.
Ian Kuon, Jonathan Rose
2011 J jnl
VPR 5.0: FPGA CAD and architecture exploration tools with single-driver routing, heterogeneity and process scaling.
ACM Trans. Reconfigurable Technol. Syst.
Jason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Gean Ye, Wei Mark Fang, Kenneth B. Kent, Jonathan Rose
2009 A conf
VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scaling.
FPGA
Jason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Gean Ye, Wei Mark Fang, Jonathan Rose
2008 A conf
Area and delay trade-offs in the circuit and architecture design of FPGAs.
FPGA
Ian Kuon, Jonathan Rose
2008 A* conf
Automated transistor sizing for FPGA architecture exploration.
DAC
Ian Kuon, Jonathan Rose
2007 J jnl
FPGA Architecture: Survey and Challenges.
Found. Trends Electron. Des. Autom.
Ian Kuon, Russell Tessier, Jonathan Rose
2007 J jnl
Measuring the Gap Between FPGAs and ASICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ian Kuon, Jonathan Rose
2006 A conf
Measuring the gap between FPGAs and ASICs.
FPGA
Ian Kuon, Jonathan Rose
2005 A conf
Design, layout and verification of an FPGA using automated tools.
FPGA
Ian Kuon, Aaron Egier, Jonathan Rose
2004 A conf
FPGA-based supercomputing: an implementation for molecular dynamics.
FPGA
Ian Kuon, Navid Azizi, Ahmad Darabiha, Aaron Egier, Paul Chow
2004 Misc conf
Reconfigurable Molecular Dynamics Simulator.
FCCM
Navid Azizi, Ian Kuon, Aaron Egier, Ahmad Darabiha, Paul Chow
2004 A conf
Transistor grouping and metal layer trade-offs in automatic tile layout of FPGAs.
FPGA
Ian Kuon, Aaron Egier, Jonathan Rose