Ian A. Young

44 papers A* 2C 3Journal 31Unranked 8
YearRankTypeTitle / Venue / Authors
2026 J jnl
Ultra Memory-Efficient On-FPGA Training of Transformers via Tensor-Compressed Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jiayi Tian, Jinming Lu, Hai Li, Xiangwei Wang, Cong Callie Hao, Ian A. Young, Zheng Zhang
2025 — conf
16 Arrays of 32 All-to-All Coupled CMOS Oscillators for AI Inference and Combinatorial Optimization.
CICC
Hai Li, James S. Ayers, Anni Lu, You Li, Dmitri E. Nikonov, Yongping Fan, Ian A. Young
2025 J jnl
DeepOHeat-v1: Efficient Operator Learning for Fast and Trustworthy Thermal Simulation and Optimization in 3D-IC Design.
CoRR
Xinling Yu, Ziyue Liu, Hai Li, Yixing Li, Xin Ai, Zhiyu Zeng, Ian A. Young, Zheng Zhang
2025 C conf
Digital Compute-in-Memory Ising Annealer with Ferroelectric Capacitor-Based nvSRAM for Combinatorial Optimization Problems.
ISCAS
Yuyao Kong, Jianwei Jia, Anni Lu, Faaiq G. Waqar, Yuan-Chun Luo, Hai Li, Ian A. Young, Shimeng Yu
2025 — conf
Enhanced Operator Learning for Scalable and Ultra-fast Thermal Simulation in 3D-IC Design.
ASP-DAC
Xinling Yu, Ziyue Liu, Hai Li, Ian A. Young, Zheng Zhang
2025 J jnl
FETTA: Flexible and Efficient Hardware Accelerator for Tensorized Neural Network Training.
CoRR
Jinming Lu, Jiayi Tian, Hai Li, Ian A. Young, Zheng Zhang
2025 J jnl
Poor Man's Training on MCUs: A Memory-Efficient Quantized Back-Propagation-Free Approach.
ACM Trans. Design Autom. Electr. Syst.
Yequan Zhao, Hai Li, Ian A. Young, Zheng Zhang
2025 J jnl
Ultra Memory-Efficient On-FPGA Training of Transformers via Tensor-Compressed Optimization.
CoRR
Jiayi Tian, Jinming Lu, Hai Li, Xiangwei Wang, Cong Hao, Ian A. Young, Zheng Zhang
2024 A* conf
Digital CIM with Noisy SRAM Bit: A Compact Clustered Annealer for Large-Scale Combinatorial Optimization.
DAC
Anni Lu, Junmo Lee, Yuan-Chun Luo, Hai Li, Ian A. Young, Shimeng Yu
2023 J jnl
Scalable In-Memory Clustered Annealer With Temporal Noise of Charge Trap Transistor for Large Scale Travelling Salesman Problems.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Anni Lu, Jae Hur, Yuan-Chun Luo, Hai Li, Dmitri E. Nikonov, Ian A. Young, Yang-Kyu Choi, Shimeng Yu
2021 J jnl
Gaussian Random Number Generator with Reconfigurable Mean and Variance using Stochastic Magnetic Tunnel Junctions.
CoRR
Punyashloka Debashis, Hai Li, Dmitri E. Nikonov, Ian A. Young
2021 J jnl
Physics-Based Models for Magneto-Electric Spin-Orbit Logic Circuits.
CoRR
Hai Li, Dmitri E. Nikonov, Chia-Ching Lin, Kerem Yunus Çamsari, Yu-Ching Liao, Chia-Sheng Hsu, Azad Naeemi, Ian A. Young
2019 J jnl
A Coupled CMOS Oscillator Array for 8ns and 55pJ Inference in Convolutional Neural Networks.
CoRR
Dmitri E. Nikonov, P. Kurahashi, J. S. Ayers, Hyung-Jin Lee, Y. Fan, Ian A. Young
2019 C conf
An Energy-Efficient Classifier via Boosted Spin Channel Networks.
ISCAS
Ameya D. Patil, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young, Naresh R. Shanbhag
2019 J jnl
Benchmarking Physical Performance of Neural Inference Circuits.
CoRR
Dmitri E. Nikonov, Ian A. Young
2019 J jnl
Convolution Inference via Synchronization of a Coupled CMOS Oscillator Array.
CoRR
Dmitri E. Nikonov, P. Kurahashi, J. S. Ayers, Hyung-Jin Lee, Y. Fan, Ian A. Young
2019 J jnl
Scalable energy-efficient magnetoelectric spin-orbit logic.
Nat.
Sasikanth Manipatruni, Dmitri E. Nikonov, Chia-Ching Lin, Tanay A. Gosavi, Huichu Liu, Bhagwati Prasad, Yen-Lin Huang, Everton Bonturim, Ramamoorthy Ramesh, Ian A. Young
2018 — conf
Hybrid piezoelectric-magnetic neurons: a proposal for energy-efficient machine learning.
ACM Southeast Regional Conference
William Scott, Jonathan Jeffrey, Blake Heard, Dmitri E. Nikonov, Ian A. Young, Sasikanth Manipatruni, Azad Naeemi, Rouhollah Mousavi Iraei
2018 J jnl
The Entity Category Security Assertion Markup Language (SAML) Attribute Types.
RFC
Ian A. Young, Leif Johansson, Scott Cantor
2017 A* conf
A Systems Approach to Computing in Beyond CMOS Fabrics: Invited.
DAC
Ameya Patil, Naresh R. Shanbhag, Lav R. Varshney, Eric Pop, H.-S. Philip Wong, Subhasish Mitra, Jan M. Rabaey, Jeffrey A. Weldon, Larry T. Pileggi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
2017 J jnl
CMOS Scaling Trends and Beyond.
IEEE Micro
Mark T. Bohr, Ian A. Young
2017 J jnl
Clocked Magnetostriction-Assisted Spintronic Device Design and Simulation.
CoRR
Rouhollah Mousavi Iraei, Nickvash Kani, Sourav Dutta, Dmitri E. Nikonov, Sasikanth Manipatruni, Ian A. Young, John T. Heron, Azad Naeemi
2017 — conf
Principles and trends in quantum nano-electronics and nano-magnetics for beyond-CMOS computing.
ESSDERC
Ian A. Young, Dmitri E. Nikonov
2017 J jnl
Shannon-inspired Statistical Computing to Enable Spintronics.
CoRR
Ameya D. Patil, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young, Naresh R. Shanbhag
2016 J jnl
Low-power Spin Valve Logic using Spin-transfer Torque with Automotion of Domain Walls.
CoRR
Sou-Chi Chang, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young, Azad Naeemi
2015 J jnl
Experimental Demonstration of Efficient Spin-Orbit Torque Switching of an MTJ with sub-100 ns Pulses.
CoRR
Tanay A. Gosavi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young, Sunil Bhave
2014 J jnl
Convolutional Networks for Image Processing by Coupled Oscillator Arrays.
CoRR
Dmitri E. Nikonov, Ian A. Young, George Bourianoff
2014 J jnl
Design of Low Voltage Tunneling-FET Logic Circuits Considering Asymmetric Conduction Characteristics.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Daniel H. Morris, Uygar E. Avci, Rafael Rios, Ian A. Young
2014 J jnl
Static and Clocked Spintronic Circuit Design and Simulation With Performance Analysis Relative to CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Vehbi Calayir, Dmitri E. Nikonov, Sasikanth Manipatruni, Ian A. Young
2013 J jnl
Overview of Beyond-CMOS Devices and a Uniform Methodology for Their Benchmarking.
Proc. IEEE
Dmitri E. Nikonov, Ian A. Young
2012 J jnl
All Spin Nano-magnetic State Elements
CoRR
Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
2012 J jnl
Device Considerations for Nanophotonic CMOS Global Interconnects
CoRR
Sasikanth Manipatruni, Michal Lipson, Ian A. Young
2012 J jnl
Material Targets for Scaling All Spin Logic
CoRR
Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
2012 J jnl
Modeling and Design of Spintronic Integrated Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
2011 — conf
A scalable sub-1.2mW 300MHz-to-1.5GHz host-clock PLL for system-on-chip in 32nm CMOS.
ISSCC
Hyung-Jin Lee, Alexandra M. Kern, Sami Hyvonen, Ian A. Young
2011 J jnl
Circuit Theory for Analysis and Design of Spintronic Integrated Circuits
CoRR
Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
2010 — conf
Analog mixed-signal circuits in advanced nano-scale CMOS technology for microprocessors and SoCs.
ESSCIRC
Ian A. Young
2010 J jnl
Optical I/O Technology for Tera-Scale Computing.
IEEE J. Solid State Circuits
Ian A. Young, Edris Mohammed, Jason T. S. Liao, Alexandra M. Kern, Samuel Palermo, Bruce A. Block, Miriam R. Reshotko, Peter L. D. Chang
2010 J jnl
Optical technology for energy efficient I/O in high performance computing.
IEEE Commun. Mag.
Ian A. Young, Edris Mohammed, Jason T. S. Liao, Alexandra M. Kern, Samuel Palermo, Bruce A. Block, Miriam R. Reshotko, Peter L. D. Chang
2009 — conf
Optical I/O technology for tera-scale computing.
ISSCC
Ian A. Young, Edris Mohammed, Jason T. S. Liao, Alexandra M. Kern, Samuel Palermo, Bruce A. Block, Miriam R. Reshotko, Peter L. D. Chang
2007 C conf
A Blind Calibration Technique to Correct Memory Errors in Amplifier-sharing Pipelined ADCs.
ISCAS
Munkyo Seo, Sopan Joshi, Ian A. Young
2004 J jnl
A CMOS 10-gb/s SONET transceiver.
IEEE J. Solid State Circuits
Harish S. Muthali, Thomas P. Thomas, Ian A. Young
2003 — conf
A CMOS 10Gb/s SONET transceiver.
ESSCIRC
Harish S. Muthali, Thomas P. Thomas, Ian A. Young
1992 J jnl
A PLL clock generator with 5 to 110 MHz of lock range for microprocessors.
IEEE J. Solid State Circuits
Ian A. Young, Jeffrey K. Greason, Keng L. Wong