Hyung-Jin Lee

22 papers Journal 6Unranked 16
YearRankTypeTitle / Venue / Authors
2021 — conf
A 50 Gbps 134 GHz 16 QAM 3 m Dielectric Waveguide Transceiver System Implemented in 22nm CMOS.
VLSI Circuits
Thomas William Brown, Georgios C. Dogiamis, Yi-Shin Yeh, Diego Correas-Serrano, Triveni S. Rane, Surej Ravikumar, Jessica C. Chou, Vijaya B. Neeli, Jose Mauricio Marulanda, Neelam Prabhu Gaunkar, Cho-Ying Lu, Iwen Huang, Ram Sadhwani, Hyung-Jin Lee, Hariprasad Chandrakumar, Jeffery W. Bates, Zinia Tuli, Qiang Yu, Mario Weiss, Jag Rangaswamy, Carlos F. Nieva, Dimitri Frolov, Telesphor Kamgaing, Ye Seul Nam, Henning Braunisch, Said Rami
2020 — conf
19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4×32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum Computers.
ISSCC
Bishnu Patra, Jeroen P. G. van Dijk, Sushil Subramanian, Andrea Corna, Xiao Xue, Charles Jeon, Farhana Sheikh, Esdras Juarez Hernandez, Brando Perez Esparza, Huzaifa Rampurawala, Brent R. Carlton, Nodar Samkharadze, Surej Ravikumar, Carlos Nieva, Sungwon Kim, Hyung-Jin Lee, Amir Sammak, Giordano Scappucci, Menno Veldhorst, Lieven M. K. Vandersypen, Masoud Babaie, Fabio Sebastiano, Edoardo Charbon, Stefano Pellerano
2020 J jnl
A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons.
IEEE J. Solid State Circuits
Jeroen Petrus Gerardus van Dijk, Bishnu Patra, Sushil Subramanian, Xiao Xue, Nodar Samkharadze, Andrea Corna, Charles Jeon, Farhana Sheikh, Esdras Juarez Hernandez, Brando Perez Esparza, Huzaifa Rampurawala, Brent R. Carlton, Surej Ravikumar, Carlos Nieva, Sungwon Kim, Hyung-Jin Lee, Amir Sammak, Giordano Scappucci, Menno Veldhorst, Lieven M. K. Vandersypen, Edoardo Charbon, Stefano Pellerano, Masoud Babaie, Fabio Sebastiano
2020 — conf
Intel 22nm Low-Power FinFET (22FFL) Process Technology for 5G and Beyond.
CICC
Hyung-Jin Lee, Steven Callender, Said Rami, Woorim Shin, Qiang Yu, Jose Mauricio Marulanda
2020 — conf
Multi-die Integration Using Advanced Packaging Technologies.
CICC
Hyung-Jin Lee, Ravi Mahajan, Farhana Sheikh, Ramune Nagisetty, Manish Deo
2019 J jnl
A Coupled CMOS Oscillator Array for 8ns and 55pJ Inference in Convolutional Neural Networks.
CoRR
Dmitri E. Nikonov, P. Kurahashi, J. S. Ayers, Hyung-Jin Lee, Y. Fan, Ian A. Young
2019 J jnl
Convolution Inference via Synchronization of a Coupled CMOS Oscillator Array.
CoRR
Dmitri E. Nikonov, P. Kurahashi, J. S. Ayers, Hyung-Jin Lee, Y. Fan, Ian A. Young
2018 — conf
An 8b subthreshold hybrid thermal sensor with ±1.07°C inaccuracy and single-element remote-sensing technique in 22nm FinFET.
ISSCC
Cho-Ying Lu, Surej Ravikumar, Amruta D. Sali, Matthias Eberlein, Hyung-Jin Lee
2018 — conf
FinFET for mm Wave - Technology and Circuit Design Challenges.
BCICTS
Steven Callender, Woorim Shin, Hyung-Jin Lee, Stefano Pellerano, Christopher D. Hull
2013 J jnl
A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.
IEEE J. Solid State Circuits
Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath
2012 — conf
32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver.
ISSCC
Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Durgesh Srivastava, Satish Venkatesan, Hyung-Jin Lee, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Krishnamurthy Soumyanath, Sunder Ramamurthy
2012 — conf
A TDC-less ADPLL with 200-to-3200MHz range and 3mW power dissipation for mobile SoC clocking in 22nm CMOS.
ISSCC
Nathaniel J. August, Hyung-Jin Lee, Martin Vandepas, Rachael J. Parker
2011 — conf
A scalable sub-1.2mW 300MHz-to-1.5GHz host-clock PLL for system-on-chip in 32nm CMOS.
ISSCC
Hyung-Jin Lee, Alexandra M. Kern, Sami Hyvonen, Ian A. Young
2009 J jnl
Face detection for video summary using illumination-compensation and morphological processing.
Pattern Recognit. Lett.
Jae-Ung Yun, Hyung-Jin Lee, Anjan Kumar Paul, Joong-Hwan Baek
2007 — conf
Content-Based Music Retrieval Using Beat Information.
FSKD (3)
Mohammad Khairul Islam, Hyung-Jin Lee, Anjan Kumar Paul, Joong-Hwan Baek
2007 J jnl
Enabling Distributed Medium Access Control for Impulse-Based Ultrawideband Radios.
IEEE Trans. Veh. Technol.
Nathaniel J. August, Hyung-Jin Lee, Dong Sam Ha
2007 — conf
Robust Face Detection for Video Summary Using Illumination-Compensation and Morphological Processing.
ICNC (2)
Jae-Ung Yun, Hyung-Jin Lee, Anjan Kumar Paul, Joong-Hwan Baek
2006 — conf
A 3 to 5GHz CMOS UWB LNA with input matching using miller effect.
ISSCC
Hyung-Jin Lee, Dong S. Ha, Sang S. Choi
2005 — conf
A low-power CMOS power amplifier for ultra wideband (UWB) applications.
ISCAS (5)
Sajay Jose, Hyung-Jin Lee, Dong Sam Ha, Sangsung Choi
2005 — conf
A systematic approach to CMOS low noise amplifier design for ultrawideband applications.
ISCAS (4)
Hyung-Jin Lee, Dong Sam Ha, Sangsung Choi
2005 — conf
Dual use of power lines for data communications in a system-on-chip environment.
ISCAS (4)
Woo Cheol Chung, Dong Sam Ha, Hyung-Jin Lee
2003 — conf
Frequency Domain Approach for CMOS Ultra-Wideband Radios.
ISVLSI
Hyung-Jin Lee, Dong Sam Ha