Hyuk Sun

12 papers C 1Journal 4Unranked 7
YearRankTypeTitle / Venue / Authors
2025 J jnl
Detection and Mitigation of nBTI Aging of a High Precision Current Comparator in 16 nm FinFET Technology.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hyuk Sun, Paul Wilkins, Steve Rose, Gil Engel
2020 J jnl
A 951-fs
IEEE J. Solid State Circuits
Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Tejasvi Anand, Un-Ku Moon
2018 J jnl
An Oversampling Stochastic ADC Using VCO-Based Quantizers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2017 — conf
A 0.951 psrms period jitter, 3.2% modulation range, DSM-free, spread-spectrum PLL.
CICC
Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Tejasvi Anand, Un-Ku Moon
2017 — conf
A 73dB SNDR 20MS/s 1.28mW SAR-TDC using hybrid two-step quantization.
CICC
Jason Muhlestein, Spencer Leuenberger, Hyuk Sun, Yang Xu, Un-Ku Moon
2017 — conf
A 74.33 dB SNDR 20 MSPS 2.74 mW pipelined ADC using a dynamic deadzone ring amplifier.
CICC
Spencer Leuenberger, Jason Muhlestein, Hyuk Sun, Praveen Kumar Venkatachala, Un-Ku Moon
2016 — conf
A 50 MHz bandwidth 54.2 dB SNDR reference-free stochastic ADC using VCO-based quantizers.
A-SSCC
Hyuk Sun, Jason Muhlestein, Spencer Leuenberger, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2016 C conf
A power efficient PLL with in-loop-bandwidth spread-spectrum modulation scheme using a charge-based discrete-time loop filter.
ISCAS
Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon
2015 — conf
A VCO-based spatial averaging stochastic ADC.
ICECS
Hyuk Sun, Jason Muhlestein, Un-Ku Moon
2015 — conf
Analysis of discrete-time charge-domain complex bandpass filter with accurately tunable center frequency.
MWSCAS
Yang Xu, Hyuk Sun, Un-Ku Moon
2015 — conf
MDLL/PLL dual-path clock generator.
MWSCAS
Hyuk Sun, Un-Ku Moon
2014 J jnl
A 10-Bit 800-MHz 19-mW CMOS ADC.
IEEE J. Solid State Circuits
Shiuh-Hua Wood Chiang, Hyuk Sun, Behzad Razavi