Hyuk-Jun Lee

21 papers A 2Misc 1Journal 17Unranked 1
YearRankTypeTitle / Venue / Authors
2020 J jnl
Multitoken-Based Power Management for NAND Flash Storage Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tae-Hee You, Sangwoo Han, Young Min Park, Hyuk-Jun Lee, Eui-Young Chung
2019 J jnl
Designing a High Performance SRAM-DRAM Hybrid Memory Architecture for Packet Buffers.
IEICE Trans. Electron.
Yongwoon Song, Dongkeon Choi, Hyuk-Jun Lee
2018 J jnl
Energy Efficient Mobile Positioning System Using Adaptive Particle Filter.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yoojin Kim, Yongwoon Song, Hyuk-Jun Lee
2017 J jnl
FeSSD: A Fast Encrypted SSD Employing On-Chip Access-Control Memory.
IEEE Comput. Archit. Lett.
Junghee Lee, Kalidas Ganesh, Hyuk-Jun Lee, Youngjae Kim
2017 J jnl
Scalable Bandwidth Shaping Scheme via Adaptively Managed Parallel Heaps in Manycore-Based Network Processors.
ACM Trans. Design Autom. Electr. Syst.
Taehyun Kim, Jongbum Lim, Jinku Kim, Woo-Cheol Cho, Eui-Young Chung, Hyuk-Jun Lee
2016 J jnl
Implementation of a large-scale language model adaptation in a cloud environment.
Multim. Tools Appl.
Kwang-Ho Kim, Dae-Young Jung, Donghyun Lee, Hyuk-Jun Lee, Sung-Yong Park, Myoung-Wan Koo, Ji-Hwan Kim, Jeong-Sik Park, Hyung-Bae Jeon, Yun-Keun Lee
2014 J jnl
A dynamic block device reconfiguration algorithm in virtual MapReduce cluster.
Clust. Comput.
Kwonyong Lee, Yoonsung Nam, Taekhee Kim, Sungyong Park, Hyuk-Jun Lee, Jihoon Yang
2014 J jnl
An Adaptive Idle-Time Exploiting Method for Low Latency NAND Flash-Based Storage Devices.
IEEE Trans. Computers
Sang-Hoon Park, Dong-gun Kim, Kwanhu Bang, Hyuk-Jun Lee, Sungjoo Yoo, Eui-Young Chung
2014 J jnl
An optimal DRAM sizing and partitioning method for NVRAM based hybrid memory architecture.
IEICE Electron. Express
Jongbum Lim, Yongwoon Song, Hyuk-Jun Lee
2014 J jnl
Classifying Useful Motion Vectors for Efficient Frame Rate Up Conversion of MC-DCT Encoded Video Streams.
J. Inf. Sci. Eng.
Jongho Nang, Sangchul Kim, Hyuk-Jun Lee
2014 J jnl
Design of a bitmap-based QoS-aware memory controller for a packet memory.
IEICE Electron. Express
Seunghak Yu, Sungroh Yoon, Eui-Young Chung, Hyuk-Jun Lee
2013 J jnl
A Low-Power Packet Memory Architecture with a Latency-Aware Packet Mapping Method.
IEICE Trans. Inf. Syst.
Hyuk-Jun Lee, Seung-Chul Kim, Eui-Young Chung
2013 A conf
Implementation of a Large-Scale Language Model in a Cloud Environment for Human-Robot Interaction.
ITCS
Dae-Young Jung, Hyuk-Jun Lee, Sung-Yong Park, Myoung-Wan Koo, Ji-Hwan Kim, Jeong-Sik Park, Hyung-Bae Jeon, Yun-Keun Lee
2013 J jnl
Page overwriting method for performance improvement of NAND flash memories.
IEICE Electron. Express
Samkyu Won, Eui-Young Chung, DuckJu Kim, Junseop Chung, Bong-Seok Han, Hyuk-Jun Lee
2012 J jnl
Analytical memory bandwidth model for many-core processor based systems.
IEICE Electron. Express
Hyuk-Jun Lee, Woo-Cheol Cho, Eui-Young Chung
2008 J jnl
Scalable QoS-Aware Memory Controller for High-Bandwidth Packet Memory.
IEEE Trans. Very Large Scale Integr. Syst.
Hyuk-Jun Lee, Eui-Young Chung
2007 J jnl
Latency-Aware Bus Arbitration for Real-Time Embedded Systems.
IEICE Trans. Inf. Syst.
Minje Jun, Kwanhu Bang, Hyuk-Jun Lee, Eui-Young Chung
2007 J jnl
Scenario-Aware Bus Functional Modeling for Architecture-Level Performance Analysis.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Eui-Young Chung, Hyuk-Jun Lee, Sung Woo Chung
2007 — conf
Slack-based Bus Arbitration Scheme for Soft Real-time Constrained Embedded Systems.
ASP-DAC
Minje Jun, Kwanhu Bang, Hyuk-Jun Lee, Naehyuck Chang, Eui-Young Chung
2000 A conf
Coarse-grained carry architecture for FPGA (poster abstract).
FPGA
Hyuk-Jun Lee, Michael J. Flynn
2000 Misc conf
Exploiting Parallelism and Data Locality of Systolic Array Applications using Multi-Ported FPGA.
PDPTA
Hyuk-Jun Lee, Albert A. Liddicoat, Michael J. Flynn