Hyochan An

12 papers Journal 4Unranked 8
YearRankTypeTitle / Venue / Authors
2024 J jnl
AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices.
IEEE J. Solid State Circuits
Zichen Fan, Qirui Zhang, Hyochan An, Boxun Xu, Li Xu, Chien-Wei Tseng, Yimai Peng, Andrea Bejarano-Carbo, Pierre Abillama, Ang Cao, Bowen Liu, Changwoo Lee, Zhehong Wang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester
2024 J jnl
RoboVisio: A Micro-Robot Vision Domain-Specific SoC for Autonomous Navigation Enabling Fully-on-Chip Intelligence via 2-MB eMRAM.
IEEE J. Solid State Circuits
Qirui Zhang, Zichen Fan, Hyochan An, Zhehong Wang, Ziyun Li, Guanru Wang, Pierre Abillama, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester
2023 — conf
A Reconfigurable Analog FIR Filter Achieving -70dB Rejection with Sharp Transition for Narrowband Receivers.
VLSI Technology and Circuits
Chien-Wei Tseng, Zhen Feng, Zichen Fan, Hyochan An, Yunfan Wang, Hun-Seok Kim, David T. Blaauw
2023 — conf
An 8.09TOPS/W Neural Engine Leveraging Bit-Sparsified Sign-Magnitude Multiplications and Dual Adder Trees.
ISSCC
Hyochan An, Yu Chen, Zichen Fan, Qirui Zhang, Pierre Abillama, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester
2023 — conf
SONA: An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal Weights.
ASAP
Pierre Abillama, Zichen Fan, Yu Chen, Hyochan An, Qirui Zhang, Seungkyu Choi, David T. Blaauw, Dennis Sylvester, Hun-Seok Kim
2022 — conf
A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence.
VLSI Technology and Circuits
Qirui Zhang, Hyochan An, Zichen Fan, Zhehong Wang, Ziyun Li, Guanru Wang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester
2022 J jnl
A Power-Efficient Brain-Machine Interface System With a Sub-mw Feature Extraction and Decoding ASIC Demonstrated in Nonhuman Primates.
IEEE Trans. Biomed. Circuits Syst.
Hyochan An, Samuel R. Nason-Tomaszewski, Jongyup Lim, Kyumin Kwon, Matthew S. Willsey, Parag G. Patil, Hun-Seok Kim, Dennis Sylvester, Cynthia A. Chestek, David T. Blaauw
2022 — conf
Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating.
VLSI Technology and Circuits
Zichen Fan, Hyochan An, Qirui Zhang, Boxun Xu, Li Xu, Chien-Wei Tseng, Yimai Peng, Ang Cao, Bowen Liu, Changwoo Lee, Zhehong Wang, FangHao Liu, Guanru Wang, Shenghao Jiang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester
2021 — conf
14.1-ENOB 184.9dB-FoM Capacitor-Array-Assisted Cascaded Charge-Injection SAR ADC.
ISSCC
Kyojin Choo, Hyochan An, Dennis Sylvester, David T. Blaauw
2021 J jnl
An Ultra-Low-Power Image Signal Processor for Hierarchical Image Recognition With Deep Neural Networks.
IEEE J. Solid State Circuits
Hyochan An, Sam Schiferl, Siddharth Venkatesan, Tim Wesley, Qirui Zhang, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu, Ziyun Li, Luyao Gong, Hengfei Zhong, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim, Dennis Sylvester
2020 — conf
1.03pW/b Ultra-Low Leakage Voltage-Stacked SRAM for Intelligent Edge Processors.
VLSI Circuits
Jingcheng Wang, Hyochan An, Qirui Zhang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester
2020 — conf
A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge.
VLSI Circuits
Hyochan An, Siddharth Venkatesan, Sam Schiferl, Tim Wesley, Qirui Zhang, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu, Ziyun Li, Hengfei Zhong, Luyao Gong, David T. Blaauw, Ronald G. Dreslinski, Dennis Sylvester, Hun-Seok Kim