Hyesoon Kim - RankMe

191 papers A* 40A 15B 17C 5Misc 5Journal 74Unranked 34

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Characterizing CPU-Induced Slowdowns in Multi-GPU LLM Inference. CoRR Euijun Chung, Yuxiao Jia, Aaron Jezghani, Hyesoon Kim
2026	J	`jnl`	CuFuzz: Hardening CUDA Programs through Transformation and Fuzzing. CoRR Saurabh Singh, Ruobing Han, Jaewon Lee, Seonjin Na, Yonghae Kim, Taesoo Kim, Hyesoon Kim
2026	B	`conf`	Inside VOLT: Designing an Open-Source GPU Compiler (Tool). CC Shinnung Jeong, Chihyo Ahn, Huanzhi Pu, Jisheng Zhao, Hyesoon Kim, Blaise Tine
2026	B	`conf`	Scaling GPU-to-CPU Migration for Efficient Distributed Execution on CPU Clusters. PPoPP Ruobing Han, Hyesoon Kim
2025	J	`jnl`	Aero: Adaptive Query Processing of ML Queries. Proc. ACM Manag. Data Gaurav Tarlok Kakkar, Jiashen Cao, Aubhro Sengupta, Joy Arulraj, Hyesoon Kim
2025	B	`conf`	Analysis of the RISC-V Vector Extension for Vulkan Graphics Kernels. ISPASS Martin Troiber, Martin Schulz, Blaise Tine, Hyesoon Kim
2025	—	`conf`	Buffer Management for Out-of-GPU LLM Execution. DEEM@SIGMOD Jiashen Cao, Joy Arulraj, Hyesoon Kim
2025	J	`jnl`	Contention-Aware GPU Thread Block Scheduler for Efficient GPU-SSD. IEEE Comput. Archit. Lett. Xueyang Liu, Seonjin Na, Euijun Chung, Jiashen Cao, Jing Yang, Hyesoon Kim
2025	—	`conf`	FlexInfer: Flexible LLM Inference with CPU Computations. MLSys Seonjin Na, Geonhwa Jeong, Byung Hoon Ahn, Aaron Jezghani, Jeffrey Young, Christopher J. Hughes, Tushar Krishna, Hyesoon Kim
2025	J	`jnl`	Hardware vs. Software Implementation of Warp-Level Features in Vortex RISC-V GPU. CoRR Huanzhi Pu, Rishabh Ravi, Shinnung Jeong, Udit Subramanya, Euijun Chung, Jisheng Zhao, Chihyo Ahn, Hyesoon Kim
2025	J	`jnl`	Inside VOLT: Designing an Open-Source GPU Compiler. CoRR Shinnung Jeong, Chihyo Ahn, Huanzhi Pu, Jisheng Zhao, Hyesoon Kim, Blaise Tine
2025	A*	`conf`	Let-Me-In: (Still) Employing In-pointer Bounds Metadata for Fine-grained GPU Memory Safety. HPCA Jaewon Lee, Euijun Chung, Saurabh Singh, Seonjin Na, Yonghae Kim, Jaekyu Lee, Hyesoon Kim
2025	B	`conf`	Multiway Merge Partitioning for Sparse-Sparse Matrix Multiplication on GPUs. PACT Eric Lorimer, Ruobing Han, Sung Ha Kang, Hyesoon Kim
2025	J	`jnl`	RV-CURE: A RISC-V Capability Architecture for Full Memory Safety. IEEE Trans. Computers Yonghae Kim, Anurag Kar, Jaewon Lee, Jaekyu Lee, Hyesoon Kim
2025	Misc	`conf`	SoftCUDA: Running CUDA on Softcore GPU. FCCM Chihyo Ahn, Ruobing Han, Udit Subramanya, Jisheng Zhao, Blaise Tine, Hyesoon Kim
2025	A*	`conf`	SparseWeaver: Converting Sparse Operations as Dense Operations on GPUs for Graph Workloads. HPCA Shinnung Jeong, Liam Paul Coopert, Ju Min Lee, Heelim Choi, Nicholas Parnenzini, Chihyo Ahn, Yongwoo Lee, Hanjun Kim, Hyesoon Kim
2025	A*	`conf`	Swift and Trustworthy Large-Scale GPU Simulation with Fine-Grained Error Modeling and Hierarchical Clustering. MICRO Euijun Chung, Seonjin Na, Sung Ha Kang, Hyesoon Kim
2024	A*	`conf`	Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs. ISCA Yuan Feng, Seonjin Na, Hyesoon Kim, Hyeran Jeon
2024	—	`conf`	Comparative Analysis of Executing GPU Applications on FPGA: HLS vs. Soft GPU Approaches. IPDPS (Workshops) Chihyo Ahn, Shinnung Jeong, Liam Paul Cooper, Nicholas Parnenzini, Hyesoon Kim
2024	J	`jnl`	CuPBoP: Making CUDA a Portable Language. ACM Trans. Design Autom. Electr. Syst. Ruobing Han, Jun Chen, Bhanu Garg, Xule Zhou, John Lu, Jeffrey Young, Jaewoong Sim, Hyesoon Kim
2024	A	`conf`	Enabling Fine-Grained Incremental Builds by Making Compiler Stateful. CGO Ruobing Han, Jisheng Zhao, Hyesoon Kim
2024	B	`conf`	Exponentially Expanding the Phase-Ordering Search Space via Dormant Information. CC Ruobing Han, Hyesoon Kim
2024	J	`jnl`	Hydro: Adaptive Query Processing of ML Queries. CoRR Gaurav Tarlok Kakkar, Jiashen Cao, Aubhro Sengupta, Joy Arulraj, Hyesoon Kim
2024	J	`jnl`	Quantifying CO IEEE Micro Andrei Bersatti, Euna Kim, Hyesoon Kim
2024	—	`conf`	Towards "True" GPU Performance Scaling for OpenGPU. HCS Blaise Tine, Hyesoon Kim
2024	J	`jnl`	Towards Performance-Aware Allocation for Accelerated Machine Learning on GPU-SSD Systems. CoRR Ayush Gundawar, Euijun Chung, Hyesoon Kim
2024	—	`conf`	Understanding Performance Implications of LLM Inference on CPUs. IISWC Seonjin Na, Geonhwa Jeong, Byung Hoon Ahn, Jeffrey Young, Tushar Krishna, Hyesoon Kim
2024	A*	`conf`	Unleashing CPU Potential for Executing GPU Programs Through Compiler/Runtime Optimizations. MICRO Ruobing Han, Jisheng Zhao, Hyesoon Kim
2023	—	`conf`	Context-Aware Task Handling in Resource-Constrained Robots with Virtualization. EDGE Ramyad Hadidi, Nima Shoghi Ghaleshahi, Bahar Asgari, Hyesoon Kim
2023	—	`conf`	Creating Robust Deep Neural Networks with Coded Distributed Computing for IoT. EDGE Ramyad Hadidi, Jiashen Cao, Bahar Asgari, Hyesoon Kim
2023	—	`conf`	CuPBoP-AMD: Extending CUDA to AMD Platforms. SC Workshops Jun Chen, Xule Zhou, Hyesoon Kim
2023	B	`conf`	CuPBoP: A Framework to Make CUDA Portable. PPoPP Ruobing Han, Jun Chen, Bhanu Garg, Jeffrey Young, Jaewoong Sim, Hyesoon Kim
2023	C	`conf`	EHT-SR: An Entropy-Based Hybrid Approach for Faster Super-Resolution. ISM Abhilash Dharmavarapu, Stefano Petrangeli, Jiashen Cao, Hyesoon Kim
2023	—	`conf`	Extending the Life of Old Systems with More Memory. MEMSYS Euna Kim, Andrei Bersatti, Hyesoon Kim
2023	J	`jnl`	GPU Database Systems Characterization and Optimization. Proc. VLDB Endow. Jiashen Cao, Rathijit Sen, Matteo Interlandi, Joy Arulraj, Hyesoon Kim
2023	J	`jnl`	Hardware-Assisted Code-Pointer Tagging for Forward-Edge Control-Flow Integrity. IEEE Comput. Archit. Lett. Yonghae Kim, Anurag Kar, Jaewon Lee, Jaekyu Lee, Hyesoon Kim
2023	J	`jnl`	Mitigating Timing-Based NoC Side-Channel Attacks With LLC Remapping. IEEE Comput. Archit. Lett. Anurag Kar, Xueyang Liu, Yonghae Kim, Gururaj Saileshwar, Hyesoon Kim, Tushar Krishna
2023	J	`jnl`	RV-CURE: A RISC-V Capability Architecture for Full Memory Safety. CoRR Yonghae Kim, Anurag Kar, Jaewon Lee, Jaekyu Lee, Hyesoon Kim
2023	—	`conf`	Reducing Inference Latency with Concurrent Architectures for Image Recognition at Edge. EDGE Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim
2023	J	`jnl`	Revisiting Query Performance in GPU Database Systems. CoRR Jiashen Cao, Rathijit Sen, Matteo Interlandi, Joy Arulraj, Hyesoon Kim
2023	—	`conf`	Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs. ASPLOS (3) Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Cooper, Hyesoon Kim
2023	—	`conf`	Spica: Exploring FPGA Optimizations to Enable an Efficient SpMV Implementation for Computations at Edge. EDGE Dheeraj Ramchandani, Bahar Asgari, Hyesoon Kim
2023	A	`conf`	Traversing Large Compressed Graphs on GPUs. IPDPS Prasun Gera, Hyesoon Kim
2023	—	`conf`	Unified Co-Simulation Framework for Autonomous UAVs. PEARC Sri Ranganathan Palaniappan, Varun Pateel, Sam Jijina, Jeffrey Young, Hyesoon Kim
2023	A*	`conf`	VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs. HPCA Geonhwa Jeong, Sana Damani, Abhimanyu Rajeshkumar Bambhaniya, Eric Qin, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna
2023	J	`jnl`	VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs. CoRR Geonhwa Jeong, Sana Damani, Abhimanyu Rajeshkumar Bambhaniya, Eric Qin, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna
2022	—	`conf`	Accelerating Graphic Rendering on Programmable RISC-V GPUs. HCS Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Paul Cooper, Sam Jijina, Swetha Rajagoplan, Tejaswini Anand Kumar, Jeffrey Young, Hyesoon Kim
2022	J	`jnl`	COX : Exposing CUDA Warp-level Functions to CPUs. ACM Trans. Archit. Code Optim. Ruobing Han, Jaewon Lee, Jaewoong Sim, Hyesoon Kim
2022	J	`jnl`	CuPBoP: CUDA for Parallelized and Broad-range Processors. CoRR Ruobing Han, Jun Chen, Bhanu Garg, Jeffrey Young, Jaewoong Sim, Hyesoon Kim
2022	—	`conf`	FiGO: Fine-Grained Query Optimization in Video Analytics. SIGMOD Conference Jiashen Cao, Karan Sarkar, Ramyad Hadidi, Joy Arulraj, Hyesoon Kim
2022	B	`conf`	Maia: Matrix Inversion Acceleration Near Memory. FPL Bahar Asgari, Dheeraj Ramchandani, Amaan Marfatia, Hyesoon Kim
2022	A*	`conf`	Securing GPU via region-based bounds checking. ISCA Jaewon Lee, Yonghae Kim, Jiashen Cao, Euna Kim, Jaekyu Lee, Hyesoon Kim
2021	J	`jnl`	COX: CUDA on X86 by Exposing Warp-Level Functions to CPUs. CoRR Ruobing Han, Jaewon Lee, Jaewoong Sim, Hyesoon Kim
2021	J	`jnl`	Context-Aware Task Handling in Resource-Constrained Robots with Virtualization. CoRR Ramyad Hadidi, Nima Shoghi Ghaleshahi, Bahar Asgari, Hyesoon Kim
2021	—	`conf`	Copernicus: Characterizing the Performance Implications of Compression Formats Used in Sparse Workloads. IISWC Bahar Asgari, Ramyad Hadidi, Joshua Dierberger, Charlotte Steinichen, Amaan Marfatia, Hyesoon Kim
2021	J	`jnl`	Creating Robust Deep Neural Networks With Coded Distributed Computing for IoT Systems. CoRR Ramyad Hadidi, Jiashen Cao, Hyesoon Kim
2021	J	`jnl`	Efficiently Solving Partial Differential Equations in a Partially Reconfigurable Specialized Hardware. IEEE Trans. Computers Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim, Sudhakar Yalamanchili
2021	A*	`conf`	FAFNIR: Accelerating Sparse Gathering by Using Efficient Near-Memory Intelligent Reduction. HPCA Bahar Asgari, Ramyad Hadidi, Jiashen Cao, Da Eun Shim, Sung Kyu Lim, Hyesoon Kim
2021	A*	`conf`	Quantifying the design-space tradeoffs in autonomous drones. ASPLOS Ramyad Hadidi, Bahar Asgari, Sam Jijina, Adriana Amyette, Nima Shoghi, Hyesoon Kim
2021	A*	`conf`	RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. DAC Geonhwa Jeong, Eric Qin, Ananda Samajdar, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna
2021	J	`jnl`	RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. CoRR Geonhwa Jeong, Eric Qin, Ananda Samajdar, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna
2021	J	`jnl`	SmaQ: Smart Quantization for DNN Training by Exploiting Value Clustering. IEEE Comput. Archit. Lett. Nima Shoghi, Andrei Bersatti, Moinuddin K. Qureshi, Hyesoon Kim
2021	J	`jnl`	Supporting CUDA for an extended RISC-V GPU architecture. CoRR Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon Kim
2021	J	`jnl`	THIA: Accelerating Video Analytics using Early Inference and Fine-Grained Query Planning. CoRR Jiashen Cao, Ramyad Hadidi, Joy Arulraj, Hyesoon Kim
2021	A*	`conf`	Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics. MICRO Blaise Tine, Krishna Praveen Yalamarthy, Fares Elsabbagh, Hyesoon Kim
2021	J	`jnl`	Vortex: Extending the RISC-V ISA for GPGPU and 3D-GraphicsResearch. CoRR Blaise Tine, Fares Elsabbagh, Krishna Praveen Yalamarthy, Hyesoon Kim
2020	A*	`conf`	ALRESCHA: A Lightweight Reconfigurable Sparse-Computation Accelerator. HPCA Bahar Asgari, Ramyad Hadidi, Tushar Krishna, Hyesoon Kim, Sudhakar Yalamanchili
2020	A	`conf`	ASCELLA: Accelerating Sparse Computation by Enabling Stream Accesses to Memory. DATE Bahar Asgari, Ramyad Hadidi, Hyesoon Kim
2020	A*	`conf`	Batch-Aware Unified Memory Management in GPUs for Irregular Workloads. ASPLOS Hyojong Kim, Jaewoong Sim, Prasun Gera, Ramyad Hadidi, Hyesoon Kim
2020	A	`conf`	Cash: A Single-Source Hardware-Software Codesign Framework for Rapid Prototyping. FPGA Blaise Tine, Fares Elsabbagh, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim
2020	J	`jnl`	Copernicus: Characterizing the Performance Implications of Compression Formats Used in Sparse Workloads. CoRR Bahar Asgari, Ramyad Hadidi, Joshua Dierberger, Charlotte Steinichen, Hyesoon Kim
2020	J	`jnl`	Edge-Tailored Perception: Fast Inferencing in-the-Edge with Efficient Model Distribution. CoRR Ramyad Hadidi, Bahar Asgari, Jiashen Cao, Younmin Bae, Hyojong Kim, Michael S. Ryoo, Hyesoon Kim
2020	A*	`conf`	Hardware-based Always-On Heap Memory Safety. MICRO Yonghae Kim, Jaekyu Lee, Hyesoon Kim
2020	C	`conf`	MEISSA: Multiplying Matrices Efficiently in a Scalable Systolic Architecture. ICCD Bahar Asgari, Ramyad Hadidi, Hyesoon Kim
2020	—	`conf`	Neural Network Weight Compression with NNW-BDI. MEMSYS Andrei Bersatti, Nima Shoghi, Hyesoon Kim
2020	B	`ed.`	PACT '20: International Conference on Parallel Architectures and Compilation Techniques, Virtual Event, GA, USA, October 3-7, 2020 PACT Vivek Sarkar, Hyesoon Kim
2020	A*	`conf`	PISCES: Power-Aware Implementation of SLAM by Customizing Efficient Sparse Algebra. DAC Bahar Asgari, Ramyad Hadidi, Nima Shoghi Ghaleshahi, Hyesoon Kim
2020	—	`conf`	Parallel Hash Table Design for NDP Systems. MEMSYS Pranith Kumar, Hyesoon Kim
2020	A	`conf`	Productive Hardware Designs using Hybrid HLS-RTL Development. FPGA Blaise Tine, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim
2020	Misc	`conf`	Proposing a Fast and Scalable Systolic Array for Matrix Multiplication. FCCM Bahar Asgari, Ramyad Hadidi, Hyesoon Kim
2020	B	`conf`	RISC-V FPGA Platform Toward ROS-Based Robotics Application. FPL Jaewon Lee, Hanning Chen, Jeffrey S. Young, Hyesoon Kim
2020	J	`jnl`	Reducing Inference Latency with Concurrent Architectures for Image Recognition. CoRR Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim
2020	J	`jnl`	Secure Location-Aware Authentication and Communication for Intelligent Transportation Systems. CoRR Nima Shoghi Ghaleshahi, Ramyad Hadidi, Jaewon Lee, Jun Chen, Arthur Siqueira, Rahul Rajan, Shaan Dhawan, Pooya Shoghi Ghalehshahi, Hyesoon Kim
2020	A	`conf`	Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. DATE Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim
2020	J	`jnl`	The 2019 Top Picks in Computer Architecture. IEEE Micro Hyesoon Kim
2020	—	`conf`	Things to Consider to Enable Dynamic Graphs in Processing-in-Memory. MEMSYS Euna Kim, Hyesoon Kim
2020	J	`jnl`	Toward Collaborative Inferencing of Deep Neural Networks on Internet-of-Things Devices. IEEE Internet Things J. Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim
2020	J	`jnl`	Traversing Large Graphs on GPUs with Unified Memory. Proc. VLDB Endow. Prasun Gera, Hyojong Kim, Piyush Sao, Hyesoon Kim, David A. Bader
2020	B	`conf`	Understanding the Software and Hardware Stacks of a General-Purpose Cognitive Drone. ISPASS Sam Jijina, Adriana Amyette, Nima Shoghi Ghaleshahi, Ramyad Hadidi, Hyesoon Kim
2020	J	`jnl`	Vortex: OpenCL Compatible RISC-V GPGPU. CoRR Fares Elsabbagh, Blaise Tine, Priyadarshini Roshan, Ethan Lyons, Euna Kim, Da Eun Shim, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim
2019	J	`jnl`	A Case Study: Exploiting Neural Machine Translation to Translate CUDA to OpenCL. CoRR Yonghae Kim, Hyesoon Kim
2019	B	`conf`	Capella: Customizing Perception for Edge Devices by Efficiently Allocating FPGAs to DNNs. FPL Younmin Bae, Ramyad Hadidi, Bahar Asgari, Jiashen Cao, Hyesoon Kim
2019	—	`conf`	Characterizing the Deployment of Deep Neural Networks on Commercial Edge Devices. IISWC Ramyad Hadidi, Jiashen Cao, Yilun Xie, Bahar Asgari, Tushar Krishna, Hyesoon Kim
2019	—	`conf`	Characterizing the Execution of Deep Neural Networks on Collaborative Robots and Edge Devices. PEARC Matthew L. Merck, Bingyao Wang, Lixing Liu, Chunjun Jia, Arthur Siqueira, Qiusen Huang, Abhijeet Saraha, Dongsuk Lim, Jiashen Cao, Ramyad Hadidi, Hyesoon Kim
2019	J	`jnl`	Collaborative Execution of Deep Neural Networks on Internet of Things Devices. CoRR Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim
2019	J	`jnl`	ERIDANUS: Efficiently Running Inference of DNNs Using Systolic Arrays. IEEE Micro Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili
2019	B	`conf`	Empirical Investigation of Stale Value Tolerance on Parallel RNN Training. ISPASS Joo Hwan Lee, Hyesoon Kim
2019	A*	`conf`	FlashGPU: Placing New Flash Next to GPU Cores. DAC Jie Zhang, Miryeong Kwon, Hyojong Kim, Hyesoon Kim, Myoungsoo Jung
2019	A*	`conf`	LODESTAR: Creating Locally-Dense CNNs for Efficient Inference on Systolic Arrays. DAC Bahar Asgari, Ramyad Hadidi, Hyesoon Kim, Sudhakar Yalamanchili
2019	B	`conf`	POSTER: Tango: An Optimizing Compiler for Just-In-Time RTL Simulation. PACT Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim, Jeffrey S. Vetter
2019	A*	`conf`	Robustly Executing DNNs in IoT Systems Using Coded Distributed Computing. DAC Ramyad Hadidi, Jiashen Cao, Michael S. Ryoo, Hyesoon Kim
2019	J	`jnl`	Thermal-aware processing-in-memory instruction offloading. J. Parallel Distributed Comput. Lifeng Nai, Ramyad Hadidi, He Xiao, Hyojong Kim, Jaewoong Sim, Hyesoon Kim
2019	A	`conf`	Translating CUDA to OpenCL for Hardware Generation using Neural Machine Translation. CGO Yonghae Kim, Hyesoon Kim
2019	Misc	`conf`	Video analytics from edge to server: work-in-progress. CODES+ISSS Jiashen Cao, Ramyad Hadidi, Joy Arulraj, Hyesoon Kim
2018	J	`jnl`	CODA: Enabling Co-location of Computation and Data for Multiple GPU Systems. ACM Trans. Archit. Code Optim. Hyojong Kim, Ramyad Hadidi, Lifeng Nai, Hyesoon Kim, Nuwan Jayasena, Yasuko Eckert, Onur Kayiran, Gabriel H. Loh
2018	A	`conf`	CoolPIM: Thermal-Aware Source Throttling for Efficient PIM Instruction Offloading. IPDPS Lifeng Nai, Ramyad Hadidi, He Xiao, Hyojong Kim, Jaewoong Sim, Hyesoon Kim
2018	J	`jnl`	Distributed Perception by Collaborative Robots. IEEE Robotics Autom. Lett. Ramyad Hadidi, Jiashen Cao, Matthew Woodward, Michael S. Ryoo, Hyesoon Kim
2018	J	`jnl`	Musical Chair: Efficient Real-Time Recognition Using Collaborative IoT Devices. CoRR Ramyad Hadidi, Jiashen Cao, Matthew Woodward, Michael S. Ryoo, Hyesoon Kim
2018	B	`conf`	Performance Characterisation and Simulation of Intel's Integrated GPU Architecture. ISPASS Prasun Gera, Hyojong Kim, Hyesoon Kim, Sunpyo Hong, Vinod George, Chi-Keung Luk
2018	B	`conf`	Performance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube. ISPASS Ramyad Hadidi, Bahar Asgari, Jeffrey S. Young, Burhan Ahmad Mudassar, Kartikay Garg, Tushar Krishna, Hyesoon Kim
2018	—	`conf`	Real-Time Image Recognition Using Collaborative IoT Devices. ReQuEST@ASPLOS Ramyad Hadidi, Jiashen Cao, Matthew Woodward, Michael S. Ryoo, Hyesoon Kim
2018	J	`jnl`	StaleLearn: Learning Acceleration with Asynchronous Synchronization Between Model Replicas on PIM. IEEE Trans. Computers Joo Hwan Lee, Hyesoon Kim
2017	J	`jnl`	CAIRO: A Compiler-Assisted Technique for Enabling Instruction-Level Offloading of Processing-In-Memory. ACM Trans. Archit. Code Optim. Ramyad Hadidi, Lifeng Nai, Hyojong Kim, Hyesoon Kim
2017	J	`jnl`	CODA: Enabling Co-location of Computation and Data for Near-Data Processing. CoRR Hyojong Kim, Ramyad Hadidi, Lifeng Nai, Hyesoon Kim, Nuwan Jayasena, Yasuko Eckert, Onur Kayiran, Gabriel H. Loh
2017	J	`jnl`	Demystifying the Characteristics of 3D-Stacked Memories: A Case Study for Hybrid Memory Cube. CoRR Ramyad Hadidi, Bahar Asgari, Burhan Ahmad Mudassar, Saibal Mukhopadhyay, Sudhakar Yalamanchili, Hyesoon Kim
2017	—	`conf`	Demystifying the characteristics of 3D-stacked memories: A case study for Hybrid Memory Cube. IISWC Ramyad Hadidi, Bahar Asgari, Burhan Ahmad Mudassar, Saibal Mukhopadhyay, Sudhakar Yalamanchili, Hyesoon Kim
2017	J	`jnl`	Exploring big graph computing - An empirical study from architectural perspective. J. Parallel Distributed Comput. Lifeng Nai, Yinglong Xia, Ilie Gabriel Tanase, Hyesoon Kim
2017	A*	`conf`	GraphPIM: Enabling Instruction-Level PIM Offloading in Graph Computing Frameworks. HPCA Lifeng Nai, Ramyad Hadidi, Jaewoong Sim, Hyojong Kim, Pranith Kumar, Hyesoon Kim
2017	A*	`conf`	Inferring Fine-grained Control Flow Inside SGX Enclaves with Branch Shadowing. USENIX Security Symposium Sangho Lee, Ming-Wei Shih, Prasun Gera, Taesoo Kim, Hyesoon Kim, Marcus Peinado
2017	—	`conf`	Lightweight SIMT core designs for intelligent 3D stacked DRAM. MEMSYS Chad D. Kersey, Hyesoon Kim, Sudhakar Yalamanchili
2017	J	`jnl`	Louvre: Light-weight Ordering Using Versioning for Release Consistency. CoRR Pranith Kumar, Prasun Gera, Hyojong Kim, Hyesoon Kim
2017	J	`jnl`	Performance Implications of NoCs on 3D-Stacked Memories: Insights from the Hybrid Memory Cube. CoRR Ramyad Hadidi, Bahar Asgari, Jeffrey S. Young, Burhan Ahmad Mudassar, Kartikay Garg, Tushar Krishna, Hyesoon Kim
2017	A	`conf`	SimProf: A Sampling Framework for Data Analytic Workloads. IPDPS Jen-Cheng Huang, Lifeng Nai, Pranith Kumar, Hyojong Kim, Hyesoon Kim
2016	—	`conf`	Analyzing Consistency Issues in HMC Atomics. MEMSYS Pranith Kumar, Lifeng Nai, Hyesoon Kim
2016	J	`jnl`	Inferring Fine-grained Control Flow Inside SGX Enclaves with Branch Shadowing. CoRR Sangho Lee, Ming-Wei Shih, Prasun Gera, Taesoo Kim, Hyesoon Kim, Marcus Peinado
2016	J	`jnl`	On the Internet of Things. IEEE Micro Vijay Janapa Reddi, Hyesoon Kim
2015	J	`jnl`	Accelerating Application Start-up with Nonvolatile Memory in Android Systems. IEEE Micro Hyojong Kim, Hong-Yeol Lim, Dilan Manatunga, Hyesoon Kim, Giho Park
2015	B	`conf`	BSSync: Processing Near Memory for Machine Learning Workloads with Bounded Staleness Consistency Models. PACT Joo Hwan Lee, Jaewoong Sim, Hyesoon Kim
2015	J	`jnl`	Block-Precise Processors: Low-Power Processors with Reduced Operand Store Accesses and Result Broadcasts. IEEE Trans. Computers Nagesh B. Lakshminarayana, Hyesoon Kim
2015	J	`jnl`	GREEN Cache: Exploiting the Disciplined Memory Model of OpenCL on GPUs. IEEE Trans. Computers Jaekyu Lee, Dong Hyuk Woo, Hyesoon Kim, Mani Azimi
2015	A	`conf`	GraphBIG: understanding graph computing in the context of industrial solutions. SC Lifeng Nai, Yinglong Xia, Ilie Gabriel Tanase, Hyesoon Kim, Ching-Yung Lin
2015	J	`jnl`	Hardware Support for Safe Execution of Native Client Applications. IEEE Comput. Archit. Lett. Dilan Manatunga, Joo Hwan Lee, Hyesoon Kim
2015	—	`conf`	Instruction Offloading with HMC 2.0 Standard: A Case Study for Graph Traversals. MEMSYS Lifeng Nai, Hyesoon Kim
2015	J	`jnl`	OpenCL Performance Evaluation on Modern Multicore CPUs. Sci. Program. Joo Hwan Lee, Nimit Nigania, Hyesoon Kim, Kaushik Patel, Hyojong Kim
2015	—	`conf`	SIMT-based Logic Layers for Stacked DRAM Architectures: A Prototype. MEMSYS Chad D. Kersey, Sudhakar Yalamanchili, Hyesoon Kim
2015	J	`jnl`	SP-CNN: A Scalable and Programmable CNN-Based Accelerator. IEEE Micro Dilan Manatunga, Hyesoon Kim, Saibal Mukhopadhyay
2015	—	`conf`	Understanding Energy Aspects of Processing-near-Memory for HPC Workloads. MEMSYS Hyojong Kim, Hyesoon Kim, Sudhakar Yalamanchili, Arun F. Rodrigues
2014	C	`conf`	Design Space Exploration of Memory Model for Heterogeneous Computing. SBAC-PAD Jieun Lim, Hyesoon Kim
2014	A*	`conf`	GPUMech: GPU Performance Modeling Technique Based on Interval Analysis. MICRO Jen-Cheng Huang, Joo Hwan Lee, Hyesoon Kim, Hsien-Hsin S. Lee
2014	Misc	`conf`	Harmonica: An FPGA-Based Data Parallel Soft Core. FCCM Chad D. Kersey, Sudhakar Yalamanchili, Hyojong Kim, Nimit Nigania, Hyesoon Kim
2014	J	`jnl`	Power Modeling for GPU Architectures Using McPAT. ACM Trans. Design Autom. Electr. Syst. Jieun Lim, Nagesh B. Lakshminarayana, Hyesoon Kim, William J. Song, Sudhakar Yalamanchili, Wonyong Sung
2014	A*	`conf`	Spare register aware prefetching for graph algorithms on GPUs. HPCA Nagesh B. Lakshminarayana, Hyesoon Kim
2014	A	`conf`	TBPoint: Reducing Simulation Time for Large-Scale GPGPU Kernels. IPDPS Jen-Cheng Huang, Lifeng Nai, Hyesoon Kim, Hsien-Hsin S. Lee
2014	A*	`conf`	Transparent Hardware Management of Stacked DRAM as Part of Memory. MICRO Jaewoong Sim, Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Hyesoon Kim
2013	J	`jnl`	Adaptive virtual channel partitioning for network-on-chip in heterogeneous architectures. ACM Trans. Design Autom. Electr. Syst. Jaekyu Lee, Si Li, Hyesoon Kim, Sudhakar Yalamanchili
2013	—	`conf`	CHiP: A Profiler to Measure the Effect of Cache Contention on Scalability. IPDPS Workshops Bevin Brett, Pranith Kumar, Minjang Kim, Hyesoon Kim
2013	J	`jnl`	Design space exploration of on-chip ring interconnection for a CPU-GPU heterogeneous architecture. J. Parallel Distributed Comput. Jaekyu Lee, Si Li, Hyesoon Kim, Sudhakar Yalamanchili
2013	—	`conf`	OpenCL Performance Evaluation on Modern Multi Core CPUs. IPDPS Workshops Joo Hwan Lee, Kaushik Patel, Nimit Nigania, Hyojong Kim, Hyesoon Kim
2013	J	`jnl`	SD3: An Efficient Dynamic Data-Dependence Profiling Mechanism. IEEE Trans. Computers Minjang Kim, Nagesh B. Lakshminarayana, Hyesoon Kim, Chi-Keung Luk
2013	—	`conf`	SESH Framework: A Space Exploration Framework for GPU Application and Hardware Codesign. PMBS@SC Joo Hwan Lee, Jiayuan Meng, Hyesoon Kim
2012	A*	`conf`	A Mostly-Clean DRAM Cache for Effective Hit Speculation and Self-Balancing Dispatch. MICRO Jaewoong Sim, Gabriel H. Loh, Hyesoon Kim, Mike O'Connor, Mithuna Thottethodi
2012	B	`conf`	A performance analysis framework for identifying potential benefits in GPGPU applications. PPoPP Jaewoong Sim, Aniruddha Dasgupta, Hyesoon Kim, Richard W. Vuduc
2012	J	`jnl`	DRAM Scheduling Policy for GPGPU Architectures Based on a Potential Function. IEEE Comput. Archit. Lett. Nagesh B. Lakshminarayana, Jaekyu Lee, Hyesoon Kim, Jinwoo Shin
2012	—	`conf`	Design space exploration of memory model for heterogeneous computing. MSPC Jieun Lim, Hyesoon Kim
2012	A*	`conf`	FLEXclusion: Balancing cache capacity and on-chip bandwidth via Flexible Exclusion. ISCA Jaewoong Sim, Jaekyu Lee, Moinuddin K. Qureshi, Hyesoon Kim
2012	—	`book`	Performance Analysis and Tuning for General Purpose Graphics Processing Units (GPGPU) Hyesoon Kim, Richard W. Vuduc, Sara S. Baghsorkhi, Jeewhan Choi, Wen-mei W. Hwu
2012	A	`conf`	Predicting Potential Speedup of Serial Code via Lightweight Profiling and Emulations with Memory Performance Model. IPDPS Minjang Kim, Pranith Kumar, Hyesoon Kim, Bevin Brett
2012	—	`conf`	Supporting virtual memory in GPGPU without supporting precise exceptions. MSPC Hyesoon Kim
2012	A*	`conf`	TAP: A TLP-aware cache management policy for a CPU-GPU heterogeneous architecture. HPCA Jaekyu Lee, Hyesoon Kim
2012	J	`jnl`	When Prefetching Works, When It Doesn't, and Why. ACM Trans. Archit. Code Optim. Jaekyu Lee, Hyesoon Kim, Richard W. Vuduc
2010	A*	`conf`	An integrated GPU power and performance model. ISCA Sunpyo Hong, Hyesoon Kim
2010	Misc	`conf`	Design space exploration of the turbo decoding algorithm on GPUs. CASES Dongwon Lee, Marilyn Wolf, Hyesoon Kim
2010	A*	`conf`	Many-Thread Aware Prefetching Mechanisms for GPGPU Applications. MICRO Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim, Richard W. Vuduc
2010	A*	`conf`	SD3: A Scalable Approach to Dynamic Data-Dependence Profiling. MICRO Minjang Kim, Hyesoon Kim, Chi-Keung Luk
2009	A	`conf`	Age based scheduling for asymmetric multiprocessors. SC Nagesh B. Lakshminarayana, Jaekyu Lee, Hyesoon Kim
2009	A*	`conf`	An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness. ISCA Sunpyo Hong, Hyesoon Kim
2009	A*	`conf`	Qilin: exploiting parallelism on heterogeneous multiprocessors with adaptive mapping. MICRO Chi-Keung Luk, Sunpyo Hong, Hyesoon Kim
2009	J	`jnl`	Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction Using Conditional Branch Prediction Hardware. IEEE Trans. Computers Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn
2008	J	`jnl`	Dynamic Predication of Indirect Jumps. IEEE Comput. Archit. Lett. José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt
2008	A*	`conf`	Improving the performance of object-oriented languages with dynamic predication of indirect jumps. ASPLOS José A. Joao, Onur Mutlu, Hyesoon Kim, Rishi Agarwal, Yale N. Patt
2008	A*	`conf`	Performance-aware speculation control using wrong path usefulness prediction. HPCA Chang Joo Lee, Hyesoon Kim, Onur Mutlu, Yale N. Patt
2008	C	`conf`	Understanding performance, power and energy behavior in asymmetric multiprocessors. ICCD Nagesh B. Lakshminarayana, Hyesoon Kim
2007	J	`jnl`	Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication. IEEE Micro Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt
2007	J	`jnl`	Dynamic Predication of Indirect Jumps. IEEE Comput. Archit. Lett. José A. Joao, Onur Mutlu, Hyesoon Kim, Yale N. Patt
2007	A*	`conf`	Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers. HPCA Santhosh Srinath, Onur Mutlu, Hyesoon Kim, Yale N. Patt
2007	A	`conf`	Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors. CGO Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt
2007	A*	`conf`	VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization. ISCA Hyesoon Kim, José A. Joao, Onur Mutlu, Chang Joo Lee, Yale N. Patt, Robert Cohn
2006	A	`conf`	2D-Profiling: Detecting Input-Dependent Branches with a Single Input Data Set. CGO Hyesoon Kim, M. Aater Suleman, Onur Mutlu, Yale N. Patt
2006	J	`jnl`	Address-Value Delta (AVD) Prediction: A Hardware Technique for Efficiently Parallelizing Dependent Cache Misses. IEEE Trans. Computers Onur Mutlu, Hyesoon Kim, Yale N. Patt
2006	A*	`conf`	Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths. MICRO Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt
2006	J	`jnl`	Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance. IEEE Micro Onur Mutlu, Hyesoon Kim, Yale N. Patt
2006	J	`jnl`	Wish Branches: Enabling Adaptive and Aggressive Predicated Execution. IEEE Micro Hyesoon Kim, Onur Mutlu, Yale N. Patt, Jared Stark
2005	A*	`conf`	Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns. MICRO Onur Mutlu, Hyesoon Kim, Yale N. Patt
2005	J	`jnl`	An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors. IEEE Trans. Computers Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt
2005	J	`jnl`	On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor. IEEE Comput. Archit. Lett. Onur Mutlu, Hyesoon Kim, Jared Stark, Yale N. Patt
2005	A*	`conf`	Techniques for Efficient Processing in Runahead Execution Engines. ISCA Onur Mutlu, Hyesoon Kim, Yale N. Patt
2005	J	`jnl`	Using the First-Level Caches as Filters to Reduce the Pollution Caused by Speculative Memory References. Int. J. Parallel Program. Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt
2005	A*	`conf`	Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution. MICRO Hyesoon Kim, Onur Mutlu, Jared Stark, Yale N. Patt
2004	C	`conf`	Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance. SBAC-PAD Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt
2004	—	`conf`	Understanding the effects of wrong-path memory references on processor performance. WMPI Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale N. Patt
2004	A*	`conf`	Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery. MICRO David N. Armstrong, Hyesoon Kim, Onur Mutlu, Yale N. Patt