Hyeonchan Lim

17 papers Journal 8Unranked 9
YearRankTypeTitle / Venue / Authors
2025 J jnl
Multistage Enhanced Diagnosis With Fault Candidate Reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hyojoon Yun, Hyeonchan Lim, Hayoung Lee, Sungho Kang
2024 J jnl
An Efficient Scan Diagnosis for Intermittent Faults Using CNN With Multi-Channel Data.
IEEE Access
Hyojoon Yun, Hyeonchan Lim, Hayoung Lee, Doohyun Yoon, Sungho Kang
2024 J jnl
Reconfigurable Multi-Bit Scan Flip-Flop for Cell-Aware Diagnosis.
IEEE Trans. Circuits Syst. II Express Briefs
Hyeonchan Lim, Tae-Hyun Kim, Sungho Kang
2022 J jnl
A Hybrid Test Scheme for Automotive IC in Multisite Testing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hyeonchan Lim, Hyojoon Yun, Sungho Kang
2022 — conf
Cell-Aware Scan Diagnosis Using Partially Synchronous Set and Reset.
ISOCC
Hyeonchan Lim, Hyojoon Yun, Juyong Lee, Sungho Kang
2022 — conf
Logic Diagnosis Based on Deep Learning for Multiple Faults.
ISOCC
Tae Hyun Kim, Hyeonchan Lim, Minho Cheong, Hyojoon Yun, Sungho Kang
2022 J jnl
Scan Cell Modification for Intra Cell-Aware Scan Chain Diagnosis.
IEEE Trans. Circuits Syst. II Express Briefs
Hyeonchan Lim, Hyojoon Yun, Sungho Kang
2021 J jnl
Enhanced Postbond Test Architecture for Bridge Defects Between the TSVs.
IEEE Trans. Very Large Scale Integr. Syst.
Jungil Mok, Hyeonchan Lim, Sungho Kang
2020 — conf
Diagnosis of Scan Chain Faults Based-on Machine-Learning.
ISOCC
Hyeonchan Lim, Tae Hyun Kim, Seunghwan Kim, Sungho Kang
2020 J jnl
Robust Secure Shield Architecture for Detection and Protection Against Invasive Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Young-Woo Lee, Hyeonchan Lim, Youngkwang Lee, Sungho Kang
2018 — conf
A Software-based Scan Chain Diagnosis for Double Faults in A Scan Chain.
ISOCC
Hyeonchan Lim, Seokjun Jang, Sungho Kang
2017 — conf
Broadcast scan compression based on deterministic pattern generation algorithm.
ISQED
Hyeonchan Lim, Sungyoul Seo, Soyeon Kang, Sungho Kang
2017 J jnl
Grouping-Based TSV Test Architecture for Resistive Open and Bridge Defects in 3-D-ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Young-Woo Lee, Hyeonchan Lim, Sungho Kang
2017 — conf
Off-chip test architecture for improving multi-site testing efficiency using tri-state decoder and 3V-level encoder.
ISQED
Sungyoul Seo, Hyeonchan Lim, Soyeon Kang, Sungho Kang
2017 — conf
Test data reduction method based on berlekamp-massey algorithm.
ISOCC
Hyeonchan Lim, Junghwan Kim, Soyeon Kang, Sungho Kang
2016 — conf
Software-based embedded core test using multi-polynomial for test data reduction.
ISOCC
Soyeon Kang, Inhyuk Choi, Hyeonchan Lim, Sungyoul Seo, Sungho Kang
2015 — conf
Scan Chain Reordering-Aware X-Filling and Stitching for Scan Shift Power Reduction.
ATS
Sungyoul Seo, Yong Lee, Hyeonchan Lim, Joohwan Lee, Hongbom Yoo, Yojoung Kim, Sungho Kang