Husain Parvez - RankMe

22 papers A 1Journal 8Unranked 13

Year	Rank	Type	Title / Venue / Authors
2021	J	`jnl`	An Application Specific Reconfigurable Architecture with Reduced Area and Static Memory Cells. J. Circuits Syst. Comput. Muhammad Mazher Iqbal, Husain Parvez, Fasahat Hussain, Muhammad Rashid
2017	J	`jnl`	Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing. Int. J. Reconfigurable Comput. Ali Asghar, Muhammad Mazher Iqbal, Waqar Ahmed, Mujahid Ali, Husain Parvez, Muhammad Rashid
2017	—	`conf`	Logic algebra for exploiting shared SRAM-table based FPGAs for large LUT inputs. INTELLECT Ali Asghar, Muhammad Mazher Iqbal, Waqar Ahmed, Mujahid Ali, Husain Parvez, Muhammad Rashid
2017	—	`conf`	Optimizing routing network of shared hardware design for multiple application circuits. INTELLECT Muhammad Mazher Iqbal, Husain Parvez
2016	J	`jnl`	"Multi-Circuit": Automatic Generation of an Application Specific Configurable Core for Known Set of Application Circuits. J. Circuits Syst. Comput. Muhammad Mazher Iqbal, Husain Parvez, Muhammad Rashid
2016	—	`conf`	Exploring shared SRAM tables among NPN equivalent large LUTs in SRAM-based FPGAs. FPT Ali Asghar, Muhammad Mazher Iqbal, Waqar Ahmed, Mujahid Ali, Husain Parvez, Muhammad Rashid
2015	J	`jnl`	An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs. Int. J. Reconfigurable Comput. Ali Asghar, Husain Parvez
2014	—	`conf`	Design-space exploration between FPGA and ASIF. ReCoSoC Muhammad Amin Qureshi, Husain Parvez
2014	—	`conf`	Diffusion-Based Placement Algorithm for Reducing High Interconnect Demand in Congested Regions of FPGAs. ARC Ali Asghar, Husain Parvez
2014	—	`conf`	Exploring alternate trade-offs of placement quality versus runtime in Simulated Annealing algorithm. ReCoSoC Baqar Raza, Husain Parvez, Muhammad Mohiuddin
2013	J	`jnl`	Exploration and optimization of a homogeneous tree-based application specific inflexible FPGA. Microelectron. J. Umer Farooq, Husain Parvez, Habib Mehrez, Zied Marrakchi
2012	J	`jnl`	A new heterogeneous tree-based application specific FPGA and its comparison with mesh-based application specific FPGA. Microprocess. Microsystems Umer Farooq, Husain Parvez, Habib Mehrez, Zied Marrakchi
2011	J	`jnl`	Application-Specific FPGA using heterogeneous logic blocks. ACM Trans. Reconfigurable Technol. Syst. Husain Parvez, Zied Marrakchi, Alp Kiliç, Habib Mehrez
2011	—	`conf`	Comparison between Heterogeneous Mesh-Based and Tree-Based Application Specific FPGA. ARC Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez
2011	J	`jnl`	Exploration of Heterogeneous FPGA Architectures. Int. J. Reconfigurable Comput. Umer Farooq, Husain Parvez, Habib Mehrez, Zied Marrakchi
2010	—	`conf`	Application Specific FPGA Using Heterogeneous Logic Blocks. ARC Husain Parvez, Zied Marrakchi, Habib Mehrez
2010	—	`conf`	Exploration of Heterogeneous FPGA Architectures. ReCoSoC Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez
2010	A	`conf`	Heterogeneous-ASIF: an application specific inflexible FPGA using heterogeneous logic blocks (abstract only). FPGA Husain Parvez, Zied Marrakchi, Habib Mehrez
2010	—	`conf`	On the optimization of FPGA area depending on target applications. APCCAS Zied Marrakchi, Husain Parvez, Alp Kiliç, Habib Mehrez, Hmaied Marrakchi
2009	—	`conf`	ASIF: Application Specific Inflexible FPGA. FPT Husain Parvez, Zied Marrakchi, Habib Mehrez
2008	—	`conf`	A new coarse-grained FPGA architecture exploration environment. FPT Husain Parvez, Zied Marrakchi, Umer Farooq, Habib Mehrez
2008	—	`conf`	Enhanced Methodology and Tools for Exploring Domain-Specific Coarse-Grained FPGAs. ReConFig Husain Parvez, Zied Marrakchi, Habib Mehrez