Hung-Ming Chen

190 papers A* 4A 27B 4C 5Journal 60Unranked 90
YearRankTypeTitle / Venue / Authors
2025 J jnl
An Energy-Area-Efficient 3D Interleaved-Ring Accelerator With INT/FP Pipelined PE Array and 3D-SRAM Cube for On-Device CNN Training and DM Inference.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wei Lu, Hung-Ming Chen, Po-Tsang Huang
2025 J jnl
CFIRSTNET: Comprehensive Features for Static IR Drop Estimation with Neural Network.
CoRR
Yu-Tung Liu, Yu-Hao Cheng, Shao-Yu Wu, Hung-Ming Chen
2025 A conf
Clock and Power Supply-Aware High Accuracy Phase Interpolator Layout Synthesis.
DATE
Siou-Sian Lin, Shih-Yu Chen, Yu-ping Huang, Tzu-Chuan Lin, Hung-Ming Chen, Wei-Zen Chen
2025 — conf
Efficient Guard Ring-Aware Placement for FinFET Analog Circuits with Diffusion Sharing.
SMACD
Shih-Yu Chen, Tzu-Hsiang Wei, Hao-Ju Chang, Hung-Ming Chen, Chien-Nan Jimmy Liu
2025 J jnl
GIRD: A Green IR-Drop Estimation Method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chee-An Yu, Yu-Tung Liu, Yu-Hao Cheng, Shao-Yu Wu, Hung-Ming Chen, C.-C. Jay Kuo
2025 C conf
Irregular Operation-Unit-based Compression for Non-Volatile Computation-in-Memory Accelerator.
ISCAS
Liang-Te Huang, Wei Lu, Hung-Ming Chen, Po-Tsang Huang
2025 A* conf
Late Breaking Results: Scalable GPU-Friendly Parallelization for Sweep-Based Maze Routing.
DAC
Cheng-Yu Chiang, Zong-Ying Cai, Chao-Chi Lan, Yan-Jen Chen, Yang Hsu, Yao-Wen Chang, Hung-Ming Chen
2025 — conf
Leveraging RAG and Generative AI for Enhanced Healthcare Navigation and Information Access in Intelligent Wheelchair System.
AIBC
Hung-Ming Chen, Shu-Ping Lu, Yung-Feng Lu
2025 — conf
Linear Regression-Based Cloud Resource Demand Forecasting and Dynamic Scheduling.
RACS
Yung-Feng Lu, Hung-Ming Chen, Chin-Fu Kuo, Shu-Ping Lu, Hong-Sheng Sun
2025 J jnl
Miniaturized and Cost-Effective Programmable 2.5D/3.5D Platforms Enabled by Scalable Embedded Active Bridge Chipset.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Wei Lu, Jie Zhang, Yi-Hui Wei, Hsu-Ming Hsiao, Sih-Han Li, Chao-Kai Hsu, Chih-Cheng Hsiao, Feng-Hsiang Lo, Shyh-Shyuan Sheu, Chin-Hung Wang, Ching-Iang Li, Yung-Sheng Chang, Ming-Ji Dai, Wei-Chung Lo, Shih-Chieh Chang, Hung-Ming Chen, Kuan-Neng Chen, Po-Tsang Huang
2025 — conf
Mixed-Size Placement Prototyping Based on Reinforcement Learning with Semi-Concurrent Optimization.
ASP-DAC
Cheng-Yu Chiang, Yi-Hsien Chiang, Chao-Chi Lan, Yang Hsu, Che-Ming Chang, Shao-Chi Huang, Sheng-Hua Wang, Yao-Wen Chang, Hung-Ming Chen
2025 — conf
On Awareness of Offset-Via and Teardrop in Advanced Packaging Interconnect Synthesis.
ASP-DAC
Hao-Ju Chang, Yu-Hung Chen, Hao-Wei Huang, Yihua Yeh, Hung-Ming Chen, Chien-Nan Jimmy Liu
2025 — conf
On Efficient Crosstalk Predictability for Fanout Package Designs.
SOCC
Chung-Yu Hsieh, Hung-Ming Chen, Shih-Hsien Wu, Chien-Ming Hsu, Wei-Hung Liu
2025 — conf
User-Centric Adaptive SDS: Data Compression and Erasure Coding for Efficient Ceph Storage.
RACS
Shu-Ping Lu, Hung-Ming Chen, Chin-Fu Kuo, Yung-Feng Lu, Yen-Ming Chen
2024 — conf
3DIC with Stacked FinFET, Inter-Level Metal, and Field-Size (25×33mm
VLSI Technology and Circuits
Bo-Jheng Shih, Yu-Ming Pan, Hao-Tung Chung, Chieh-Ling Lee, I-Chun Hsieh, Nein-Chih Lin, Chih-Chao Yang, Po-Tsang Huang, Hung-Ming Chen, Chiao-Yen Wang, Huan-Yu Chiu, Huang-Chung Cheng, Chang-Hong Shen, Wen-Fa Wu, Tuo-Hung Hou, Kuan-Neng Chen, Chenming Hu
2024 — conf
A 28nm 343.5fps/W Vision Transformer Accelerator with Integer-Only Quantized Attention Block.
AICAS
Cheng-Chen Lin, Wei Lu, Po-Tsang Huang, Hung-Ming Chen
2024 C conf
A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with Mixed FXP4/FP16 for On-Device Transfer Learning.
ISCAS
Wei Lu, Han-Hsiang Pei, Jheng-Rong Yu, Hung-Ming Chen, Po-Tsang Huang
2024 — conf
A Decentralized Gas-Free E-Ticket Tourism System with Dynamic Security: A Blockchain-based Approach.
RACS
Shu-Ping Lu, Hung-Ming Chen, Cheng-Yun Ho
2024 A conf
CFIRSTNET: Comprehensive Features for Static IR Drop Estimation with Neural Network.
ICCAD
Yu-Tung Liu, Yu-Hao Cheng, Shao-Yu Wu, Hung-Ming Chen
2024 — conf
Design of A Traffic Control Mechanism Based on O-RAN.
ISPACS
Hung-Ming Chen, Yung-Feng Lu, Guan-Bo Fang, Chin-Chien Lu
2024 — conf
Designing Dynamic Access Control Based on ZTA in A 5G MANO System.
ISPACS
Hung-Ming Chen, Yung-Feng Lu, Yu-Lung Kuo, Yi-Ming Chuang
2024 — conf
Efficient Analog Layout Generation for In-RRAM Computing Circuits via Area and Wire Optimization.
MWSCAS
Bo-Han Li, Kuan-Chih Lin, Hao Zuo, Po-Cheng Pan, Hung-Ming Chen, Shyh-Jye Jou, Chien-Nan Jimmy Liu, Bo-Cheng Lai
2024 — conf
Enabling System Design in 3D Integration: Technologies and Methodologies.
ISPD
Hung-Ming Chen
2024 — conf
IoT-assisted Smart Mushroom Cultivation.
RACS
Yung-Feng Lu, Hung-Ming Chen, Chin-Fu Kuo, Chin-Ku Lee
2024 — conf
ML/DL-Based Signal Integrity Optimization for InFO Routing.
NewCAS
Bo-Kai Kang, Hao-Ju Chang, Hung-Ming Chen, Chien-Nan Jimmy Liu
2024 — conf
Mitigating Power and Process Variation for Analog CIM Design Migration.
SMACD
Shih-Han Chang, Shih-Yu Chen, Chun-Wen Yang, Hau-Wei Huang, Yu-cheng Yang, Wei-Liang Chen, Chien-Nan Liu, Hung-Ming Chen
2024 J jnl
One Raman DTS Interrogator Channel Supports a Dual Separate Path to Realize Spatial Duplexing.
Sensors
Cheng-Kai Yao, Chun-Hsiang Peng, Hung-Ming Chen, Wen-Yang Hsu, Tzu-Chiao Lin, Yibeltal Chanie Manie, Peng-Chun Peng
2024 — conf
Scalable Embedded Multi-Die Active Bridge (S-EMAB) Chips with Integrated LDOs for Low-Cost Programmable 2.5D/3.5D Packaging Technology.
VLSI Technology and Circuits
Wei Lu, Jie Zhang, Yi-Hui Wei, Hsu-Ming Hsiao, Sih-Han Li, Chao-Kai Hsu, Chih-Cheng Hsiao, Feng-Hsiang Lo, Shyh-Shyuan Sheu, Chin-Hung Wang, Wei-Chung Lo, Shih-Chieh Chang, Hung-Ming Chen, Kuan-Neng Chen, Po-Tsang Huang
2023 — conf
DPRoute: Deep Learning Framework for Package Routing.
ASP-DAC
Yeu-Haw Yeh, Simon Yi-Hung Chen, Hung-Ming Chen, Deng-Yao Tu, Guan-Qi Fang, Yun-Chih Kuo, Po-Yang Chen
2023 — conf
Layout Synthesis of Analog Primitive Cells with Variational Autoencoder.
SMACD
Po-Chun Wang, Mark Po-Hung Lin, Chien-Nan Jimmy Liu, Hung-Ming Chen
2023 — conf
On Automating Finger-Cap Array Synthesis with Optimal Parasitic Matching for Custom SAR ADC.
ASP-DAC
Cheng-Yu Chiang, Chia-Lin Hu, Mark Po-Hung Lin, Yu-Szu Chung, Shyh-Jye Jou, Jieh-Tsorng Wu, Shiuh-Hua Wood Chiang, Chien-Nan Jimmy Liu, Hung-Ming Chen
2023 J jnl
On Reducing LDE Variations in Modern Analog Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
A. K. Thasreefa, Abhishek Patyal, Hao-Yu Chi, Mark Po-Hung Lin, Hung-Ming Chen
2023 — conf
On-Interposer Decoupling Capacitors Placement for Interposer-based 3DIC.
ISQED
Po-Yang Chen, Chang-Yun Liu, Hung-Ming Chen, Po-Tsang Huang
2023 J jnl
Pole-Aware Analog Layout Synthesis Considering Monotonic Current Flows and Wire Crossings.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Abhishek Patyal, Hung-Ming Chen, Mark Po-Hung Lin, Guan-Qi Fang, Simon Yi-Hung Chen
2023 — conf
Reshaping System Design in 3D Integration: Perspectives and Challenges.
ISPD
Hung-Ming Chen, Chu-Wen Ho, Shih-Hsien Wu, Wei Lu, Po-Tsang Huang, Hao-Ju Chang, Chien-Nan Jimmy Liu
2022 — conf
An Embedded Multi-Die Active Bridge (EMAB) Chip for Rapid-Prototype Programmable 2.5D/3D Packaging Technology.
VLSI Technology and Circuits
Jie Zhang, Wei Lu, Po-Tsang Huang, Sih-Han Li, Tsung-Yi Hung, Shih-Hsien Wu, Ming-Ji Dai, I-Shan Chung, Wen-Chao Chen, Chin-Hung Wang, Shyh-Shyuan Sheu, Hung-Ming Chen, Kuan-Neng Chen, Wei-Chung Lo, Chih-I Wu
2022 — conf
An OpenDDS cross-platform data exchange module for cloud-edge-based industrial internet of things.
RACS
Hung-Ming Chen, Yung-Feng Lu, Jia-Hong Jhang, Hong-Sheng Sun
2022 A conf
DASC: A DRAM Data Mapping Methodology for Sparse Convolutional Neural Networks.
DATE
Bo-Cheng Lai, Tzu-Chieh Chiang, Po-Shen Kuo, Wan-Ching Wang, Yan-Lin Hung, Hung-Ming Chen, Chien-Nan Liu, Shyh-Jye Jou
2022 J jnl
Deep Learning Model for Dynamic Hand Gesture Recognition for Natural Human-Machine Interface on End Devices.
Int. J. Inf. Syst. Model. Des.
Tsui-Ping Chang, Hung-Ming Chen, Shih-Ying Chen, Wei-Cheng Lin
2022 — conf
Digital Computation-in-Memory Design with Adaptive Floating Point for Deep Neural Networks.
MCSoC
Yun-Ru Yang, Wei Lu, Po-Tsang Huang, Hung-Ming Chen
2022 J jnl
Innovative service model of information services based on the sustainability balanced scorecard: Applied integration of the fuzzy Delphi method, Kano model, and TRIZ.
Expert Syst. Appl.
Hung-Ming Chen, Hung-Yi Wu, Pih-Shuw Chen
2022 — conf
Memory-Centric Fusion-based CNN Accelerator with 3D-NoC and 3D-DRAM.
ISOCC
Wei Lu, Pei-Yu Ge, Po-Tsang Huang, Hung-Ming Chen, Wei Hwang
2022 — conf
On Optimizing Capacitor Array Design for Advanced Node SAR ADC.
SMACD
Cheng-Yu Chiang, Chia-Lin Hu, Kang-Yu Chang, Mark Po-Hung Lin, Shyh-Jye Jou, Hung-Yu Chen, Chien-Nan Jimmy Liu, Hung-Ming Chen
2022 A conf
Practical Substrate Design Considering Symmetrical and Shielding Routes.
DATE
Hao-Yu Chi, Simon Yi-Hung Chen, Hung-Ming Chen, Chien-Nan Liu, Yun-Chih Kuo, Ya-Hsin Chang, Kuan-Hsien Ho
2022 — conf
Precision-Aware Workload Distribution and Dataflow for a Hybrid Digital-CIM Deep CNN Accelerator.
ISOCC
Jui-I Kao, Wei Lu, Po-Tsang Huang, Hung-Ming Chen
2022 — conf
Red-black tree I/O management of solid state disk with elastic striping design.
RACS
Yung-Feng Lu, Hung-Ming Chen, Chang-Wei Chen, Hsueh-Wen Tseng, Chin-Fu Kuo
2022 — conf
Substrate Signal Routing Solution Exploration for High-Density Packages with Machine Learning.
VLSI-DAT
Yeu-Haw Yeh, Simon Yi-Hung Chen, Hung-Ming Chen, Deng-Yao Tu, Guan-Qi Fang, Yun-Chih Kuo, Po-Yang Chen
2021 J jnl
A Style-Based Analog Layout Migration Technique With Complete Routing Behavior Preservation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hao-Yu Chi, Zi-Jun Lin, Chia-Hao Hung, Chien-Nan Jimmy Liu, Hung-Ming Chen
2021 J jnl
An Energy-Efficient 3D Cross-Ring Accelerator With 3D-SRAM Cubes for Hybrid Deep Neural Networks.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Wei Lu, Po-Tsang Huang, Hung-Ming Chen, Wei Hwang
2021 J jnl
Improving the Quality of FPGA RO-PUF by Principal Component Analysis (PCA).
ACM J. Emerg. Technol. Comput. Syst.
K. A. Asha, Li En Hsu, Abhishek Patyal, Hung-Ming Chen
2021 — conf
Learning Based Placement Refinement to Reduce DRC Short Violations.
VLSI-DAT
Ying-Yao Huang, Chang-Tzu Lin, Wei-Lun Liang, Hung-Ming Chen
2021 — conf
On Reconfiguring Memory-Centric AI Edge Devices for CIM.
ISOCC
Hung-Ming Chen, Cheng-En Ni, Kang-Yu Chang, Tzu-Chieh Chiang, Shih-Han Chang, Cheng-Yu Chiang, Bo-Cheng Lai, Chien-Nan Liu, Shyh-Jye Jou
2020 — conf
A Three-Factor Mutual Authentication Scheme for Cyber-Physical Systems.
RACS
Yung-Feng Lu, Chin-Fu Kuo, Hung-Ming Chen, Hsueh-Wen Tseng, Shih-Chun Chou, Yu-Ming Liao
2020 A conf
Achieving Analog Layout Integrity through Learning and Migration Invited Talk.
ICCAD
Mark Po-Hung Lin, Hao-Yu Chi, Abhishek Patyal, Zheng-Yao Liu, Jun-Jie Zhao, Chien-Nan Jimmy Liu, Hung-Ming Chen
2020 — conf
Enhanced Privacy with Blockchain-based Storage for Data Sharing.
RACS
Yung-Feng Lu, Hung-Ming Chen, Chin-Fu Kuo, Bo-Ting Chen, Zong-Yan Dai
2020 J jnl
Exploring Multiple Analog Placements With Partial-Monotonic Current Paths and Symmetry Constraints Using PCP-SP.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Wei-Zen Chen
2020 — conf
Hierarchical Active Voltage Regulation for Heterogeneous TSV 3D-ICs.
SoCC
Po-Tsang Huang, Tzung-Han Tsai, Po-Jen Yang, Wei Hwang, Hung-Ming Chen
2020 A* conf
Late Breaking Results: Pole-aware Analog Placement Considering Monotonic Current Flow and Crossing-Wire Minimization.
DAC
Abhishek Patyal, Hung-Ming Chen, Mark Po-Hung Lin
2020 A conf
On EDA Solutions for Reconfigurable Memory-Centric AI Edge Applications.
ICCAD
Hung-Ming Chen, Chia-Lin Hu, Kang-Yu Chang, Alexandra Küster, Yu-Hsien Lin, Po-Shen Kuo, Wei-Tung Chao, Bo-Cheng Lai, Chien-Nan Liu, Shyh-Jye Jou
2020 A conf
On Pre-Assignment Route Prototyping for Irregular Bumps on BGA Packages.
DATE
Jyun-Ru Jiang, Yun-Chih Kuo, Simon Yi-Hung Chen, Hung-Ming Chen
2020 — conf
Timing Driven Partition for Multi-FPGA Systems with TDM Awareness.
ISPD
Sin-Hong Liou, Sean S.-Y. Liu, Richard Sun, Hung-Ming Chen
2020 J jnl
Understanding user acceptance of blockchain-based smart locker.
Electron. Libr.
Jiunn-Woei Lian, Chih-Teng Chen, Li-Fang Shen, Hung-Ming Chen
2020 J jnl
Wire Load Oriented Analog Routing with Matching Constraints.
ACM Trans. Design Autom. Electr. Syst.
Hao-Yu Chi, Chien-Nan Jimmy Liu, Hung-Ming Chen
2019 — conf
A Structure-Based Methodology for Analog Layout Generation.
SMACD
Yu-Hsien Chen, Hao-Yu Chi, Ling-Yen Song, Chien-Nan Jimmy Liu, Hung-Ming Chen
2019 A conf
Achieving Routing Integrity in Analog Layout Migration via Cartesian Detection Lines.
ICCAD
Hao-Yu Chi, Zi-Jun Lin, Chia-Hao Hung, Chien-Nan Jimmy Liu, Hung-Ming Chen
2019 A* conf
An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit Synthesis.
DAC
Po-Cheng Pan, Chien-Chia Huang, Hung-Ming Chen
2019 J jnl
Co-placement optimization in sensor-reusable cyber-physical digital microfluidic biochips.
Microelectron. J.
Jian-De Li, Chun-Hao Kuo, Guan-Ruei Lu, Sying-Jyan Wang, Katherine Shu-Min Li, Tsung-Yi Ho, Hung-Ming Chen, Shiyan Hu
2019 — conf
Container-based load balancing for WebRTC applications.
RACS
Yung-Feng Lu, Hung-Ming Chen, Chin-Fu Kuo, Bo-Kai Tseng, Shih-Chun Chou
2019 C conf
More Effective Power Network Prototyping by Analytical and Centroid Learning.
ISCAS
Yu-Hsiang Chuang, Chang-Tzu Lin, Hung-Ming Chen, Chi-Han Lee, Ting-Sheng Chen
2018 J jnl
A Multi-Fidelity Model Approach for Simultaneous Scheduling of Machines and Vehicles in Flexible Manufacturing Systems.
Asia Pac. J. Oper. Res.
James T. Lin, Chun-Chih Chiu, Edward Huang, Hung-Ming Chen
2018 — conf
A learning-based methodology for routability prediction in placement.
VLSI-DAT
Li-Chin Chen, Chien-Chia Huang, Yao-Lin Chang, Hung-Ming Chen
2018 — conf
A mutual authentication scheme with user anonymity for cyber-physical and internet of things.
RACS
Yung-Feng Lu, Chin-Fu Kuo, Hung-Ming Chen, Guan-Bo Wang, Shih-Chun Chou
2018 A* conf
Analog placement with current flow and symmetry constraints using PCP-SP.
DAC
Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Hao-Yu Chi, Chien-Nan Liu
2018 A conf
Extending ML-OARSMT to net open locator with efficient and effective boolean operations.
ICCAD
Bing-Hui Jiang, Hung-Ming Chen
2018 J jnl
Flexible Droplet Routing in Active Matrix-Based Digital Microfluidic Biochips.
ACM Trans. Design Autom. Electr. Syst.
Guan-Ruei Lu, Chun-Hao Kuo, Kuen-Cheng Chiang, Ansuman Banerjee, Bhargab B. Bhattacharya, Tsung-Yi Ho, Hung-Ming Chen
2018 — conf
Generation of PUF-Keys on FPGAs by K-means Frequency Clustering.
AsianHOST
K. A. Asha, Abhishek Patyal, Hung-Ming Chen
2018 — conf
Multi-level droplet routing in active-matrix based digital-microfluidic biochips.
ASP-DAC
Guan-Ruei Lu, Bhargab B. Bhattacharya, Tsung-Yi Ho, Hung-Ming Chen
2018 — conf
On Closing the Gap Between Pre-Simulation and Post-Simulation Results in Nanometer Analog Layouts.
SMACD
Po-Cheng Pan, Hung-Wen Huang, Chien-Chia Huang, Abhishek Patyal, Hung-Ming Chen, Tsun-Yu Yang
2018 — conf
Performance-preserved analog routing methodology via wire load reduction.
ASP-DAC
Hao-Yu Chi, Hwa-Yi Tseng, Chien-Nan Jimmy Liu, Hung-Ming Chen
2018 J jnl
Reliability Hardening Mechanisms in Cyber-Physical Digital-Microfluidic Biochips.
ACM J. Emerg. Technol. Comput. Syst.
Guan-Ruei Lu, Ansuman Banerjee, Bhargab B. Bhattacharya, Tsung-Yi Ho, Hung-Ming Chen
2017 — conf
An analytical placer for heterogeneous FPGAs via rough-placed packing.
VLSI-DAT
Wan-Ning Wu, Chen Chen, Ching-Yu Chin, Chun-Kai Wang, Hung-Ming Chen
2017 — conf
Designing A Simple Storage Services (S3) Compatible System Based on Ceph Software-Defined Storage System.
ICMSSP
Hung-Ming Chen, Ci-Jie Li, Bi-Shun Ke
2017 — conf
Heterogeneous chip power delivery modeling and co-synthesis for practical 3DIC realization.
ASP-DAC
Wei-Hsun Liao, Chang-Tzu Lin, Sheng-Hsin Fang, Chien-Chia Huang, Hung-Ming Chen, Ding-Ming Kwai, Yung-Fa Chou
2017 — conf
On Tolerating Faults of TSV/Microbumps for Power Delivery Networks in 3D IC.
ISVLSI
Sheng-Hsin Fang, Chang-Tzu Lin, Wei-Hsun Liao, Chien-Chia Huang, Li-Chin Chen, Hung-Ming Chen, I-Hsuan Lee, Ding-Ming Kwai, Yung-Fa Chou
2017 — conf
On reliability hardening in cyber-physical digital-microfluidic biochips.
ASP-DAC
Guan-Ruei Lu, Guan-Ming Huang, Ansuman Banerjee, Bhargab B. Bhattacharya, Tsung-Yi Ho, Hung-Ming Chen
2017 J jnl
Using nanoindentation to investigate the temperature cycling of Sn-37Pb solders.
Microelectron. Reliab.
Hua-Chiang Wen, Wu-Ching Chou, Po-Chen Lin, Yeau-Ren Jeng, Chien-Chang Chen, Hung-Ming Chen, Don Son Jiang, Chun-Hu Cheng
2016 — conf
A New Methodology for Noise Sensor Placement Based on Association Rule Mining.
ACM Great Lakes Symposium on VLSI
Yu-Hsiang Hung, Sheng-Hsin Fang, Hung-Ming Chen, Shen-Min Chen, Chang-Tzu Lin, Chia-Hsin Lee
2016 J jnl
Design and evaluation of a cloud-based Mobile Health Information Recommendation system on wireless sensor networks.
Comput. Electr. Eng.
Shu-Lin Wang, Young-Long Chen, Alex Mu-Hsing Kuo, Hung-Ming Chen, Yi-Shiang Shiu
2016 — conf
Placement optimization of cyber-physical digital microfluidic biochips.
BioCAS
Chun-Hao Kuo, Guan-Ruei Lu, Tsung-Yi Ho, Hung-Ming Chen, Shiyan Hu
2016 J jnl
Using a branch-and-bound and a genetic algorithm for a single-machine total late work scheduling problem.
Soft Comput.
Chin-Chia Wu, Yunqiang Yin, Wen-Hsiang Wu, Hung-Ming Chen, Shuenn-Ren Cheng
2015 J jnl
A Fast Prototyping Framework for Analog Layout Migration With Planar Preservation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Po-Cheng Pan, Ching-Yu Chin, Hung-Ming Chen, Tung-Chieh Chen, Chin-Chieh Lee, Jou-Chun Lin
2015 — conf
An approach to anchoring and placing high performance custom digital designs.
ASP-DAC
Shih-Ying Liu, Tung-Chieh Chen, Hung-Ming Chen
2015 — conf
Closing the Gap between Global and Detailed Placement: Techniques for Improving Routability.
ISPD
Chun-Kai Wang, Chuan-Chia Huang, Shih-Ying Sean Liu, Ching-Yu Chin, Sheng-Te Hu, Wei-Chen Wu, Hung-Ming Chen
2014 J jnl
ACER: An Agglomerative Clustering Based Electrode Addressing and Routing Algorithm for Pin-Constrained EWOD Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shih-Ying Sean Liu, Chung-Hung Chang, Hung-Ming Chen, Tsung-Yi Ho
2014 — conf
An automatic synthesis tool for nanometer low dropout regulator using simulation based model and geometric programming.
VLSI-DAT
Shih-Hsin Hsu, Wei-Zen Chen, Jui-Pin Zheng, Sean S.-Y. Liu, Po-Cheng Pan, Hung-Ming Chen
2014 J jnl
Automatic image segmentation and classification based on direction texton technique for hemolytic anemia in thin blood smears.
Mach. Vis. Appl.
Hung-Ming Chen, Ya-Ting Tsao, Shin-Ni Tsai
2014 J jnl
Clock Tree Synthesis Considering Slew Effect on Supply Voltage Variation.
ACM Trans. Design Autom. Electr. Syst.
Chun-Kai Wang, Yeh-Chi Chang, Hung-Ming Chen, Ching-Yu Chin
2014 A conf
Cost-effective decap selection for beyond die power integrity.
DATE
Yi-En Chen, Tu-Hsiung Tsai, Shi-Hao Chen, Hung-Ming Chen
2014 J jnl
Fast Thermal Aware Placement With Accurate Thermal Analysis Based on Green Function.
IEEE Trans. Very Large Scale Integr. Syst.
Shih-Ying Sean Liu, Ren-Guo Luo, Suradeth Aroonsantidecha, Ching-Yu Chin, Hung-Ming Chen
2014 C conf
Improving power delivery network design by practical methodologies.
ICCD
Chia-Chi Huang, Chang-Tzu Lin, Wei-Syun Liao, Chieh-Jui Lee, Hung-Ming Chen, Chia-Hsin Lee, Ding-Ming Kwai
2014 A conf
Memcomputing: The cape of good hope: [Extended special session description].
DATE
Yiyu Shi, Hung-Ming Chen
2014 J jnl
Performance Evaluation of Continuity of Care Records (CCRs): Parsing Models in a Mobile Health Management System.
J. Medical Syst.
Hung-Ming Chen, Yong-Zan Liou
2014 A conf
Planning and placing power clamps for effective CDM protection.
ICCAD
Hsin-Chun Lin, Shih-Ying Sean Liu, Hung-Ming Chen
2014 — conf
Routability-driven bump assignment for chip-package co-design.
ASP-DAC
Meng-Ling Chen, Tu-Hsiung Tsai, Hung-Ming Chen, Shi-Hao Chen
2014 — conf
Usability Evaluation of a Cloud Computing Based Context-aware Healthcare System.
MIE
Shu-Lin Wang, Mu-Hsing Kuo, Hung-Ming Chen, Andre Kushniruk, Elizabeth M. Borycki, Yi-Hsiang Hsu
2013 J jnl
A 3D visualized expert system for maintenance and management of existing building facilities using reliability-based method.
Expert Syst. Appl.
Hung-Ming Chen, Chuan-Chien Hou, Yu-Hsiang Wang
2013 — conf
A fuzzy thresholding early termination scheme of fast motion estimation for video coding.
ISCE
Hung-Ming Chen, Jhong-Kai Lin, Po-Hung Chen, Ting-Jhao Jheng
2013 A conf
A network-flow based algorithm for power density mitigation at post-placement stage.
DATE
Shih-Ying Sean Liu, Ren-Guo Luo, Hung-Ming Chen
2013 J jnl
A study of row-based area-array I/O design planning in concurrent chip-package design flow.
ACM Trans. Design Autom. Electr. Syst.
Ren-Jie Lee, Hung-Ming Chen
2013 J jnl
Agglomerative-based flip-flop merging and relocation for signal wirelength and clock tree optimization.
ACM Trans. Design Autom. Electr. Syst.
Shih-Ying Sean Liu, Wan-Ting Lo, Chieh-Jui Lee, Hung-Ming Chen
2013 J jnl
An adaptive macroblock-mean difference based sorting scheme for fast normalized partial distortion search motion estimation.
Comput. Electr. Eng.
Hung-Ming Chen, Po-Hung Chen, Cheng-Tso Lin, Jian-Hong Ciou
2013 J jnl
Board- and Chip-Aware Package Wire Planning.
IEEE Trans. Very Large Scale Integr. Syst.
Ren-Jie Lee, Hsin-Wu Hsu, Hung-Ming Chen
2013 — conf
Design of mobile healthcare service with health records format evaluation.
ISCE
Hung-Ming Chen, Yong-Zan Liou, Shih-Ying Chen, Jhuo-Syun Li
2013 A conf
Effective power network prototyping via statistical-based clustering and sequential linear programming.
DATE
Shih-Ying Sean Liu, Chieh-Jui Lee, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee
2013 A conf
Efficient analog layout prototyping by layout reuse with routing preservation.
ICCAD
Ching-Yu Chin, Po-Cheng Pan, Hung-Ming Chen, Tung-Chieh Chen, Jou-Chun Lin
2013 J jnl
Escaped Boundary Pins Routing for High-Speed Boards.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ching-Yu Chin, Chung-Yi Kuan, Tsung-Ying Tsai, Hung-Ming Chen, Yoji Kajitani
2013 — conf
On the way to practical tools for beyond die codesign and integration.
ISPD
Hung-Ming Chen
2013 A conf
PAGE: parallel agile genetic exploration towards utmost performance for analog circuit design.
DATE
Po-Cheng Pan, Hung-Ming Chen, Chien-Chih Lin
2013 J jnl
Package routability- and IR-drop-aware finger/pad planning for single chip and stacking IC designs.
Integr.
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu, Wen-Yu Shih
2013 A conf
Using MapReduce Framework for Mining Association Rules.
ITCS
Shih-Ying Chen, Jia-Hong Li, Ke-Chung Lin, Hung-Ming Chen, Tung-Shou Chen
2012 — conf
A fast thermal aware placement with accurate thermal analysis based on Green function.
ASP-DAC
Suradeth Aroonsantidecha, Shih-Ying Liu, Ching-Yu Chin, Hung-Ming Chen
2012 A conf
Agglomerative-based flip-flop merging with signal wirelength optimization.
DATE
Shih-Ying Liu, Chieh-Jui Lee, Hung-Ming Chen
2012 J jnl
An Efficient and Secure Dynamic ID-based Authentication Scheme for Telecare Medical Information Systems.
J. Medical Syst.
Hung-Ming Chen, Jung-Wen Lo, Chang-Kuo Yeh
2012 A conf
Configurable analog routing methodology via technology and design constraint unification.
ICCAD
Po-Cheng Pan, Hung-Ming Chen, Yi-Kan Cheng, Jill Liu, Wei-Yi Hu
2012 J jnl
Dynamic guiding particle swarm optimization with embedded chaotic search for solving multidimensional problems.
Optim. Lett.
Min-Yuan Cheng, Kuo-Yu Huang, Hung-Ming Chen
2012 J jnl
Genetic programming for predicting aseismic abilities of school buildings.
Eng. Appl. Artif. Intell.
Hung-Ming Chen, Wei-Ko Kao, Hsing-Chih Tsai
2012 — conf
Hierarchical power network synthesis for multiple power domain designs.
ISQED
Chieh-Jui Lee, Shih-Ying Liu, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee
2012 J jnl
K-means particle swarm optimization with embedded chaotic search for solving multidimensional problems.
Appl. Math. Comput.
Min-Yuan Cheng, Kuo-Yu Huang, Hung-Ming Chen
2012 — conf
On construction low power and robust clock tree via slew budgeting.
ISPD
Yeh-Chi Chang, Chun-Kai Wang, Hung-Ming Chen
2012 A conf
On effective flip-chip routing via pseudo single redistribution layer.
DATE
Hsin-Wu Hsu, Meng-Ling Chen, Hung-Ming Chen, Hung-Chun Li, Shi-Hao Chen
2011 J jnl
A Generic Multi-Dimensional Scan-Control Scheme for Test-Cost Reduction.
J. Inf. Sci. Eng.
Chia-Yi Lin, Hung-Ming Chen
2011 J jnl
Aseismic ability estimation of school building using predictive data mining models.
Expert Syst. Appl.
Wei-Ko Kao, Hung-Ming Chen, Jui-Sheng Chou
2011 — conf
Clock planning for multi-voltage and multi-mode designs.
ISQED
Chang-Cheng Tsai, Tzu-Hen Lin, Shin-Han Tsai, Hung-Ming Chen
2011 J jnl
Design Planning with 3D-Via Optimization in Alternative Stacking Integrated Circuits.
J. Inf. Sci. Eng.
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu
2011 J jnl
Efficient Package Pin-Out Planning With System Interconnects Optimization for Package-Board Codesign.
IEEE Trans. Very Large Scale Integr. Syst.
Ren-Jie Lee, Hung-Ming Chen
2011 A conf
Fast analog layout prototyping for nanometer design migration.
ICCAD
Yi-Peng Weng, Hung-Ming Chen, Tung-Chieh Chen, Po-Cheng Pan, Chien-Hung Chen, Wei-Zen Chen
2011 — conf
Integrated hierarchical synthesis of analog/RF circuits with accurate performance mapping.
ISQED
Kuo-Hsuan Meng, Po-Cheng Pan, Hung-Ming Chen
2011 — conf
Mixed non-rectangular block packing for non-Manhattan layout architectures.
ISQED
Meng-Chen Wu, Hung-Ming Chen, Jing-Yang Jou
2011 — conf
New Sorting Technique on Partial Distortion Search Using Two Bit-Transform for Fast Optimal Motion Estimation.
RVSP
Hung-Ming Chen, Po-Hung Chen, Jian-Hong Ciou
2011 A conf
On routing fixed escaped boundary pins for high speed boards.
DATE
Tsung-Ying Tsai, Ren-Jie Lee, Ching-Yu Chin, Chung-Yi Kuan, Hung-Ming Chen, Yoji Kajitani
2011 — conf
Row-based area-array I/O design planning in concurrent chip-package design flow.
ASP-DAC
Ren-Jie Lee, Hung-Ming Chen
2011 — conf
TSV-based 3D-IC placement for timing optimization.
SoCC
Yi-Rong Chen, Hung-Ming Chen, Shih-Ying Liu
2011 — conf
The Development of Smart Assistive Technology Devices for Urinary Catheterization Monitoring.
ICGEC
Chuan-Pin Lu, Jui-Pin Li, Wei-Yi Liou, Hung-Ming Chen
2010 — conf
A novel two-dimensional scan-control scheme for test-cost reduction.
ISQED
Chia-Yi Lin, Hung-Ming Chen
2010 J jnl
Image Enlargement by Applying Coordinate Rotation and Kernel Stretching to Interpolation Kernels.
EURASIP J. Adv. Signal Process.
Sheng-Fu Liang, Hung-Ming Chen, Yi-Che Liu
2010 J jnl
On Reducing Test Power and Test Volume by Selective Pattern Compression Schemes.
IEEE Trans. Very Large Scale Integr. Syst.
Chia-Yi Lin, Hsiu-Chuan Lin, Hung-Ming Chen
2010 J jnl
On Reducing Test Power, Volume and Routing Cost by Chain Reordering and Test Compression Techniques.
IEICE Trans. Electron.
Chia-Yi Lin, Li-Chung Hsu, Hung-Ming Chen
2010 — conf
Simultaneous voltage island generation and floorplanning.
SoCC
Houng-Yi Li, Iris Hui-Ru Jiang, Hung-Ming Chen
2010 — conf
Technology mapping with crosstalk noise avoidance.
ASP-DAC
Fang-Yu Fan, Hung-Ming Chen, I-Min Liu
2009 — conf
A stochastic-based efficient critical area extractor on OpenAccess platform.
ACM Great Lakes Symposium on VLSI
Bo-Zhou Chen, Hung-Ming Chen, Li-Da Huang, Po-Cheng Pan
2009 — conf
Buffer/flip-flop block planning for power-integrity-driven floorplanning.
ISQED
Hsin-Hua Pan, Hung-Ming Chen, Chia-Yi Chang
2009 J jnl
Fast Flip-Chip Pin-Out Designation Respin for Package-Board Codesign.
IEEE Trans. Very Large Scale Integr. Syst.
Ren-Jie Lee, Hung-Ming Chen
2009 A conf
Package routability- and IR-drop-aware finger/pad assignment in chip-package co-design.
DATE
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu, Wen-Yu Shih
2009 J jnl
Performance-constrained voltage assignment in multiple supply voltage SoC floorplanning.
ACM Trans. Design Autom. Electr. Syst.
Meng-Chen Wu, Ming-Ching Lu, Hung-Ming Chen, Jing-Yang Jou
2008 J jnl
An Effective Decap Insertion Method Considering Power Supply Noise during Floorplanning.
J. Inf. Sci. Eng.
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu
2008 — conf
An Implementation of Performance-Driven Block and I/O Placement for Chip-Package Codesign.
ISQED
Ming-Fang Lai, Hung-Ming Chen
2008 — conf
Blockage and voltage island-aware dual-vdd buffered tree construction under fixed buffer locations.
ISPD
Bruce Tseng, Hung-Ming Chen
2008 J jnl
Design Migration From Peripheral ASIC Design to Area-I/O Flip-Chip Design by Chip I/O Planning and Legalization.
IEEE Trans. Very Large Scale Integr. Syst.
Chia-Yi Chang, Hung-Ming Chen
2008 J jnl
Effective decap insertion in area-array SoC floorplan design.
ACM Trans. Design Autom. Electr. Syst.
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu
2008 — conf
Efficient and optimal post-layout double-cut via insertion by network relaxation and min-cost maximum flow.
ACM Great Lakes Symposium on VLSI
Lun-Chun Wei, Hung-Ming Chen, Li-Da Huang, Sarah Songjie Xu
2008 J jnl
Web-FEM: An internet-based finite-element analysis framework with 3D graphics and parallel computing environment.
Adv. Eng. Softw.
Hung-Ming Chen, Yu-Chin Lin
2007 A conf
A selective pattern-compression scheme for power and test-data reduction.
ICCAD
Chia-Yi Lin, Hung-Ming Chen
2007 J jnl
Accurate prediction of enzyme subfamily class using an adaptive fuzzy k-nearest neighbor method.
Biosyst.
Wen-Lin Huang, Hung-Ming Chen, Shiow-Fen Hwang, Shinn-Ying Ho
2007 J jnl
Center of Mass-Based Adaptive Fast Block Motion Estimation.
EURASIP J. Image Video Process.
Hung-Ming Chen, Po-Hung Chen, Kuo-Liang Yeh, Wen-Hsien Fang, Mon-Chau Shie, Feipei Lai
2007 — conf
Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign.
ASP-DAC
Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen
2007 — conf
On Increasing Signal Integrity with Minimal Decap Insertion in Area-Array SoC Floorplan Design.
ASP-DAC
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu
2007 J jnl
SODOCK: Swarm optimization for highly flexible protein-ligand docking.
J. Comput. Chem.
Hung-Ming Chen, Bo-Fu Liu, Hui-Ling Huang, Shiow-Fen Hwang, Shinn-Ying Ho
2007 — conf
Using power gating techniques in area-array SoC floorplan design.
SoCC
Chi-Yi Yeh, Hung-Ming Chen, Li-Da Huang, Wei-Ting Wei, Chao-Hung Lu, Chien-Nan Jimmy Liu
2006 J jnl
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hung-Ming Chen, I-Min Liu, Martin D. F. Wong
2006 J jnl
Markov model fuzzy-reasoning based algorithm for fast block motion estimation.
J. Vis. Commun. Image Represent.
Po-Hung Chen, Hung-Ming Chen, Kuo-Jui Hung, Wen-Hsien Fang, Mon-Chau Shie, Feipei Lai
2006 — conf
On Achieving Low-Power SoC Clock Tree Synthesis by Transition Time Planning via Buffer Library Study.
SoCC
Huang-Liang Chen, Hung-Ming Chen
2006 — conf
On Optimizing Scan Testing Power and Routing Cost in Scan Chain Design.
ISQED
Li-Chung Hsu, Hung-Ming Chen
2006 — conf
Performance Constraints Aware Voltage Islands Generation in SoC Floorplan Design.
SoCC
Ming-Ching Lu, Meng-Chen Wu, Hung-Ming Chen, Iris Hui-Ru Jiang
2006 B conf
Scoring Method for Tumor Prediction from Microarray Data Using an Evolutionary Fuzzy Classifier.
PAKDD
Shinn-Ying Ho, Chih-Hung Hsieh, Kuan-Wei Chen, Hui-Ling Huang, Hung-Ming Chen, Shinn-Jang Ho
2005 — conf
Current Calculation on VLSI Signal Interconnects.
ISQED
Muzhou Shao, Youxin Gao, Li-Pen Yuan, Hung-Ming Chen, Martin D. F. Wong
2005 J jnl
Design of nearest neighbor classifiers: multi-objective approach.
Int. J. Approx. Reason.
Jian-Hung Chen, Hung-Ming Chen, Shinn-Ying Ho
2005 B conf
Efficient gene selection for classification of microarray data.
Congress on Evolutionary Computation
Shinn-Ying Ho, Chong-Cheng Lee, Hung-Ming Chen, Hui-Ling Huang
2005 B conf
Flexible protein-ligand docking using particle swarm optimization.
Congress on Evolutionary Computation
Bo-Fu Liu, Hung-Ming Chen, Hui-Ling Huang, Shiow-Fen Hwang, Shinn-Ying Ho
2005 A conf
MeSwarm: memetic particle swarm optimization.
GECCO
Bo-Fu Liu, Hung-Ming Chen, Jian-Hung Chen, Shiow-Fen Hwang, Shinn-Ying Ho
2005 J jnl
Simultaneous power supply planning and noise avoidance in floorplan design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hung-Ming Chen, Li-Da Huang, I-Min Liu, Martin D. F. Wong
2004 B conf
Design of Nearest Neighbor Classifiers Using an Intelligent Multi-objective Evolutionary Algorithm.
PRICAI
Jian-Hung Chen, Hung-Ming Chen, Shinn-Ying Ho
2004 J jnl
Design of accurate classifiers with a compact fuzzy-rule base using an evolutionary scatter partition of feature space.
IEEE Trans. Syst. Man Cybern. Part B
Shinn-Ying Ho, Hung-Ming Chen, Shinn-Jang Ho, Tai-Kang Chen
2004 C conf
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design.
ICCD
Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzhou Shao, Li-Da Huang
2003 — conf
Designing platform-based system power management on a smart tablet appliance.
ICECS
Hung-Ming Chen, Po-Hung Chen, Tai-Jee Pan, Feipei Lai
2003 — conf
Floorplanning with power supply noise avoidance.
ASP-DAC
Hung-Ming Chen, Li-Da Huang, I-Min Liu, Minghorng Lai, D. F. Wong
2003 A conf
Global Wire Bus Configuration with Minimum Delay Uncertainty.
DATE
Li-Da Huang, Hung-Ming Chen, D. F. Wong
2001 — conf
Faster and more accurate wiring evaluation in interconnect-centric floorplanning.
ACM Great Lakes Symposium on VLSI
Hung-Ming Chen, D. F. Wong, Wai-Kei Mak, Hannah Honghua Yang
2001 — conf
Integrated power supply planning and floorplanning.
ASP-DAC
I-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz, D. F. Wong
1999 A conf
Integrated floorplanning and interconnect planning.
ICCAD
Hung-Ming Chen, Hai Zhou, Fung Yu Young, D. F. Wong, Hannah Honghua Yang, Naveed A. Sherwani
1996 — conf
尋易（Csmart-Ⅱ）：智慧型網路中文資訊檢索系統 (An Intelligent Chinese Information Retrieval System for the Internet) [In Chinese].
ROCLING
Lee-Feng Chien, Ming-Jer Lee, Ming-Chuan Chen, Hung-Ming Chen, Ting-Chi Chen, Wei-Feng Tung, Hung-Chung Lee, Duen-Yi Huang, Yuan-Cheng Chang