Hung-Chih Ou

11 papers A* 7A 1Journal 3
YearRankTypeTitle / Venue / Authors
2016 J jnl
Layout-Dependent Effects-Aware Analytical Analog Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hung-Chih Ou, Kai-Han Tseng, Jhao-Yan Liu, I-Peng Wu, Yao-Wen Chang
2016 A* conf
QB-trees: towards an optimal topological representation and its applications to analog layout designs.
DAC
I-Peng Wu, Hung-Chih Ou, Yao-Wen Chang
2015 J jnl
Coupling-Aware Length-Ratio-Matching Routing for Capacitor Arrays in Analog Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kuan-Hsien Ho, Hung-Chih Ou, Yao-Wen Chang, Hui-Fang Tsao
2015 A* conf
Cutting structure-aware analog placement based on self-aligned double patterning with e-beam lithography.
DAC
Hung-Chih Ou, Kai-Han Tseng, Yao-Wen Chang
2015 A* conf
Layout-dependent-effects-aware analytical analog placement.
DAC
Hung-Chih Ou, Kai-Han Tseng, Jhao-Yan Liu, I-Peng Wu, Yao-Wen Chang
2014 J jnl
Nonuniform Multilevel Analog Routing With Matching Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hung-Chih Ou, Hsing-Chih Chang Chien, Yao-Wen Chang
2013 A* conf
Coupling-aware length-ratio-matching routing for capacitor arrays in analog integrated circuits.
DAC
Kuan-Hsien Ho, Hung-Chih Ou, Yao-Wen Chang, Hui-Fang Tsao
2013 A* conf
Double patterning lithography-aware analog placement.
DAC
Hsing-Chih Chang Chien, Hung-Chih Ou, Tung-Chieh Chen, Ta-Yu Kuan, Yao-Wen Chang
2013 A* conf
Simultaneous analog placement and routing with current flow and current density considerations.
DAC
Hung-Chih Ou, Hsing-Chih Chang Chien, Yao-Wen Chang
2012 A* conf
Non-uniform multilevel analog routing with matching constraints.
DAC
Hung-Chih Ou, Hsing-Chih Chang Chien, Yao-Wen Chang
2011 A conf
Heterogeneous B
ICCAD
Pang-Yen Chou, Hung-Chih Ou, Yao-Wen Chang