Huizheng Wang - RankMe

38 papers A* 9C 1Journal 20Unranked 7

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	BitStopper: An Efficient Transformer Attention Accelerator via Stage-fusion and Early Termination. ASP-DAC Huizheng Wang, Hongbin Wang, Shaojun Wei, Yang Hu, Shouyi Yin
2026	J	`jnl`	Designing Spatial Architectures for Sparse Attention: STAR Accelerator via Cross-Stage Tiling. IEEE Trans. Computers Huizheng Wang, Taiquan Wei, Hongbin Wang, Zichuan Wang, Xinru Tang, Zhiheng Yue, Shaojun Wei, Yang Hu, Shouyi Yin
2026	—	`conf`	LAPA: Log-Domain Prediction-Driven Dynamic Sparsity Accelerator for Transformer Model. ASP-DAC Huizheng Wang, Hongbin Wang, Shaojun Wei, Yang Hu, Shouyi Yin
2026	A*	`conf`	MoEntwine: Unleashing the Potential of Wafer-Scale Chips for Large-Scale Expert Parallel Inference. HPCA Xinru Tang, Jingxiang Hou, Dingcheng Jiang, Taiquan Wei, Jiaxin Liu, Jinyi Deng, Huizheng Wang, Qize Yang, Haoran Shang, Chao Li, Yang Hu, Shouyi Yin
2026	A*	`conf`	PADE: A Predictor-Free Sparse Attention Accelerator via Unified Execution and Stage Fusion. HPCA Huizheng Wang, Hongbin Wang, Zichuan Wang, Zhiheng Yue, Yang Wang, Chao Li, Yang Hu, Shouyi Yin
2026	A*	`conf`	ReThermal: Co-Design of Thermal-Aware Static and Dynamic Scheduling for LLM Training on Liquid-Cooled Wafer-Scale Chips. HPCA Chengran Li, Huizheng Wang, Jiaxin Liu, Jingyao Liu, Zhiheng Yue, Xia Li, Shenfei Jiang, Jinyi Deng, Yang Hu, Shouyi Yin
2026	A*	`conf`	TEMP: A Memory Efficient Physical-Aware Tensor Partition-Mapping Framework on Wafer-Scale Chips. HPCA Huizheng Wang, Taiquan Wei, Zichuan Wang, Dingcheng Jiang, Qize Yang, Jiaxin Liu, Jingxiang Hou, Chao Li, Jinyi Deng, Yang Hu, Shouyi Yin
2026	A*	`conf`	WATOS: Efficient LLM Training Strategies and Architecture Co-Exploration for Wafer-Scale Chip. HPCA Huizheng Wang, Zichuan Wang, Hongbin Wang, Jingxiang Hou, Taiquan Wei, Chao Li, Yang Hu, Shouyi Yin
2025	J	`jnl`	BETA: A Bit-Grained Transformer Attention Accelerator With Efficient Early Termination. IEEE Trans. Circuits Syst. II Express Briefs Huizheng Wang, Hongbin Wang, Zhiheng Yue, Jingyao Liu, Taiquan Wei, Shaojun Wei, Yang Hu, Shouyi Yin
2025	J	`jnl`	BitStopper: An Efficient Transformer Attention Accelerator via Stage-fusion and Early Termination. CoRR Huizheng Wang, Hongbin Wang, Shaojun Wei, Yang Hu, Shouyi Yin
2025	J	`jnl`	CV-CIM: A Hybrid Domain Xor-Derived Similarity-Aware Computation-in-Memory Supporting Cost-Volume Construction. IEEE J. Solid State Circuits Zhiheng Yue, Yang Wang, Huizheng Wang, Ruiqi Guo, Fengbin Tu, Jianxun Yang, Shaojun Wei, Yang Hu, Shouyi Yin
2025	J	`jnl`	Designing Spatial Architectures for Sparse Attention: STAR Accelerator via Cross-Stage Tiling. CoRR Huizheng Wang, Taiquan Wei, Hongbin Wang, Zichuan Wang, Xinru Tang, Zhiheng Yue, Shaojun Wei, Yang Hu, Shouyi Yin
2025	J	`jnl`	LAPA: Log-Domain Prediction-Driven Dynamic Sparsity Accelerator for Transformer Model. CoRR Huizheng Wang, Hongbin Wang, Shaojun Wei, Yang Hu, Shouyi Yin
2025	A*	`conf`	MCBP: A Memory-Compute Efficient LLM Inference Accelerator Leveraging Bit-Slice-enabled Sparsity and Repetitiveness. MICRO Huizheng Wang, Zichuan Wang, Zhiheng Yue, Yousheng Long, Taiquan Wei, Jianxun Yang, Yang Wang, Chao Li, Shaojun Wei, Yang Hu, Shouyi Yin
2025	J	`jnl`	MCBP: A Memory-Compute Efficient LLM Inference Accelerator Leveraging Bit-Slice-enabled Sparsity and Repetitiveness. CoRR Huizheng Wang, Zichuan Wang, Zhiheng Yue, Yousheng Long, Taiquan Wei, Jianxun Yang, Yang Wang, Chao Li, Shaojun Wei, Yang Hu, Shouyi Yin
2025	J	`jnl`	MoEntwine: Unleashing the Potential of Wafer-scale Chips for Large-scale Expert Parallel Inference. CoRR Xinru Tang, Jingxiang Hou, Dingcheng Jiang, Taiquan Wei, Jiaxin Liu, Jinyi Deng, Huizheng Wang, Qize Yang, Haoran Shang, Chao Li, Yang Hu, Shouyi Yin
2025	J	`jnl`	PADE: A Predictor-Free Sparse Attention Accelerator via Unified Execution and Stage Fusion. CoRR Huizheng Wang, Hongbin Wang, Zichuan Wang, Zhiheng Yue, Yang Wang, Chao Li, Yang Hu, Shouyi Yin
2025	A*	`conf`	PD Constraint-aware Physical/Logical Topology Co-Design for Network on Wafer. ISCA Qize Yang, Taiquan Wei, Sihan Guan, Chengran Li, Haoran Shang, Jinyi Deng, Huizheng Wang, Chao Li, Lei Wang, Yan Zhang, Shouyi Yin, Yang Hu
2025	—	`conf`	Spatial-Aware Orchestration of LLM Attention on Waferscale Chips. APPT Taiquan Wei, Huizheng Wang, Zichuan Wang, Shouyi Yin, Yang Hu
2025	J	`jnl`	TEMP: A Memory Efficient Physical-aware Tensor Partition-Mapping Framework on Wafer-scale Chips. CoRR Huizheng Wang, Taiquan Wei, Zichuan Wang, Dingcheng Jiang, Qize Yang, Jiaxin Liu, Jingxiang Hou, Chao Li, Jinyi Deng, Yang Hu, Shouyi Yin
2024	C	`conf`	Code Length Compatible Belief Propagation Polar Decoder Based on Folding and Unfolding. ISCAS Muhao Li, Huizheng Wang, Yifei Shen, Xiaosi Tan, Chuan Zhang
2024	A*	`conf`	Exploiting Similarity Opportunities of Emerging Vision AI Models on Hybrid Bonding Architecture. ISCA Zhiheng Yue, Huizheng Wang, Jiahao Fang, Jinyi Deng, Guangyang Lu, Fengbin Tu, Ruiqi Guo, Yuxuan Li, Yubin Qin, Yang Wang, Chao Li, Huiming Han, Shaojun Wei, Yang Hu, Shouyi Yin
2024	J	`jnl`	PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training. CoRR Jiahao Fang, Huizheng Wang, Qize Yang, Dehao Kong, Xu Dai, Jinyi Deng, Yang Hu, Shouyi Yin
2024	J	`jnl`	Robust Wideband Interference Suppression Method for GNSS Array Antenna Receiver via Hybrid Beamforming Technique. Remote. Sens. Zhenxing Xu, Qijia Dong, Shenyang Li, Fuzhan Yue, Meng Wang, Zhenghuan Xia, Xiao Chen, Shuangna Zhang, Guoji Zou, Huizheng Wang
2024	A*	`conf`	SOFA: A Compute-Memory Optimized Sparsity Accelerator via Cross-Stage Coordinated Tiling. MICRO Huizheng Wang, Jiahao Fang, Xinru Tang, Zhiheng Yue, Jinxi Li, Yubin Qin, Sihan Guan, Qinze Yang, Yang Wang, Chao Li, Yang Hu, Shouyi Yin
2024	J	`jnl`	SOFA: A Compute-Memory Optimized Sparsity Accelerator via Cross-Stage Coordinated Tiling. CoRR Huizheng Wang, Jiahao Fang, Xinru Tang, Zhiheng Yue, Jinxi Li, Yubin Qin, Sihan Guan, Qize Yang, Yang Wang, Chao Li, Yang Hu, Shouyi Yin
2023	J	`jnl`	A DSP-Purposed REconfigurable Acceleration Machine (DREAM) for High Energy Efficiency MIMO Signal Processing. IEEE Trans. Circuits Syst. I Regul. Pap. Yuxiang Fu, Kai Chen, Wenqing Song, Guoqiang He, Sirui Shen, Huizheng Wang, Chuan Zhang, Li Li
2023	J	`jnl`	An Efficient Approximate Expectation Propagation Detector With Block-Diagonal Neumann-Series. IEEE Trans. Circuits Syst. I Regul. Pap. Huizheng Wang, Bingyang Cheng, Xiaosi Tan, Xiaohu You, Chuan Zhang
2023	—	`conf`	CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction. ISSCC Zhiheng Yue, Yang Wang, Huizheng Wang, Yabing Wang, Ruiqi Guo, Limei Tang, Leibo Liu, Shaojun Wei, Yang Hu, Shouyi Yin
2023	J	`jnl`	Wafer-scale Computing: Advancements, Challenges, and Future Perspectives. CoRR Yang Hu, Xinhan Lin, Huizheng Wang, Zhen He, Xingmao Yu, Jiahao Zhang, Qize Yang, Zheng Xu, Sihan Guan, Jiahao Fang, Haoran Shang, Xinru Tang, Xu Dai, Shaojun Wei, Shouyi Yin
2022	J	`jnl`	An Efficient Stochastic Convolution Architecture Based on Fast FIR Algorithm. IEEE Trans. Circuits Syst. II Express Briefs Huizheng Wang, Weihong Xu, Zaichen Zhang, Xiaohu You, Chuan Zhang
2022	—	`ch.`	Approximate Computation for Baseband Processing. Approximate Computing Chuan Zhang, Huizheng Wang
2022	J	`jnl`	Efficient MMSE-PIC Detection for Polar-Coded System Using Tree-Structured Gray Codes. IEEE Wirel. Commun. Lett. Bingyang Cheng, Yifei Shen, Huizheng Wang, Zaichen Zhang, Xiaohu You, Chuan Zhang
2021	J	`jnl`	An Efficient Detector for Massive MIMO Based on Improved Matrix Partition. IEEE Trans. Signal Process. Huizheng Wang, Yahui Ji, Yifei Shen, Wenqing Song, Muhao Li, Xiaohu You, Chuan Zhang
2020	J	`jnl`	Efficient stochastic successive cancellation list decoder for polar codes. Sci. China Inf. Sci. Xiao Liang, Huizheng Wang, Yifei Shen, Zaichen Zhang, Xiaohu You, Chuan Zhang
2019	—	`conf`	A New Uplink Channel Estimation Architecture for Massive MIMO Systems with PDMA. ASICON Zhenhao Ji, Yahui Ji, Bolei Wang, Feifei Gao, Huizheng Wang, Chuan Zhang
2018	—	`conf`	Low-Complexity Winograd Convolution Architecture Based on Stochastic Computing. DSP Huizheng Wang, Zaichen Zhang, Xiaohu You, Chuan Zhang
2018	—	`conf`	NEUTag's Classification System for Zhihu Questions Tagging Task. NLPCC (1) Yuejia Xiang, Huizheng Wang, Duo Ji, Zheyang Zhang, Jingbo Zhu